Filter component for filtering an interference signal

Abstract

A filter component for filtering an interference signal. The filter component includes at least one multilayer ceramic capacitor having a main body, in which multiple ceramic layers and internal electrodes are stacked one above another, and connection contacts are arranged at the main body. The ceramic layers include a lead lanthanum zirconate titanate ceramic, for example.

Claims

1. A filter component for filtering an interference signal, comprising at least one multilayer ceramic capacitor having a main body, in which a plurality of ceramic layers and internal electrodes are stacked one above another, wherein connection contacts are arranged at the main body, wherein a ceramic material of the ceramic layers is of the formula
Pb.sub.(11.5a0.5b+1.5d+e+0.5f)A.sub.aB.sub.b(Zr.sub.1xTi.sub.x).sub.(1cdef)Li.sub.dC.sub.eFe.sub.fSi.sub.cO.sub.3+y.Math.PbO, wherein A is selected from a group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb; B is selected from a group consisting of Na, K and Ag; C is selected from a group consisting of Ni, Cu, Co and Mn; wherein: 0<a<0.12; 0.05x0.3; 0b<0.12; 0c<0.12; 0d<0.12; 0e<0.12; 0f<0.12; 0y<1; and wherein b+d+e+f>0.

2. The filter according to claim 1, wherein the electrical capacitance of the multilayer capacitor in a voltage range greater than zero rises as the electrical voltage increases.

3. The filter according to claim 1, wherein the ceramic layers comprise a lead lanthanum zirconate titanate ceramic.

4. The filter component according to claim 1, wherein at least one of the connection contacts comprises Invar.

5. The filter component according to claim 1, wherein at least one of the connection contacts is secured to the main body by a sintered connecting material.

6. The filter component according to claim 1, wherein an external electrode is arranged on at least one outer side of the main body, wherein the external electrode comprises at least one sputtered layer.

7. The filter component according to claim 1, wherein the multilayer capacitor comprises first internal electrodes, which are electrically connected to a first connection contact, second internal electrodes, which are connected to a second connection contact, and third internal electrodes, which are connected to none of the connection contacts.

8. The filter component according to claim 1, wherein at least one load relief region for mechanical load relief is formed in the main body.

9. The filter component according to claim 1, comprising a printed circuit board, wherein the connection contacts are connected to the printed circuit board by a sintered connecting material.

10. The filter component according to claim 9, comprising a busbar, wherein the printed circuit board is screwed to the busbar.

11. The filter component according to claim 1, wherein the multilayer ceramic capacitor is interconnected between first connections to a voltage supply and second connections to a load.

12. The filter component of claim 1, wherein at least one of the connection contacts comprises a layered structure of copper-Invar-copper.

13. The filter component according to claim 1, wherein at least one of the connection contacts is a lead frame.

14. The filter component according to claim 1, wherein the connection contact is configured in meandering fashion.

15. The filter component according to claim 1, which is suitable to be used at a temperature of 150 C. or higher.

Description

(1) In the figures:

(2) FIG. 1 shows an exemplary circuit diagram of an EMI filter,

(3) FIG. 2 shows a multilayer ceramic capacitor for an EMI filter in perspective view,

(4) FIG. 3 shows a further multilayer ceramic capacitor for an EMI filter in perspective view,

(5) FIG. 4 shows a main body of a multilayer ceramic capacitor for an EMI filter in sectional view,

(6) FIG. 5 shows a linking of a connection contact to a main body of a multilayer ceramic capacitor for an EMI filter in sectional view,

(7) FIG. 6 shows a linking of a connection contact of a multilayer ceramic capacitor for an EMI filter to a printed circuit board and a busbar in sectional view,

(8) FIG. 7 shows a capacitance-voltage diagram of a multilayer ceramic capacitor for an EMI filter,

(9) FIG. 8 shows an interference voltage curve of power electronics filtered with an EMI filter comprising a multilayer ceramic capacitor,

(10) FIG. 9 shows a capacitance-voltage diagram of two multilayer ceramic capacitors in the case of operation as an EMI filter,

(11) FIG. 10 shows a voltage-failure diagram of two multilayer ceramic capacitors in the case of operation as an EMI filter,

(12) FIG. 11 shows a failure-time diagram of two multilayer ceramic capacitors in the HAL test.

(13) Preferably, in the following figures, identical reference signs refer to functionally or structurally corresponding parts of the different embodiments.

(14) FIG. 1 shows an exemplary circuit diagram of an EMI filter 1, in particular of a DC EMI filter. A filter 1 of this type can also be referred to as an EMC (electromagnetic compatibility) filter. The filter 1 serves for filtering an interference signal that is transmitted together with a useful signal on an electrical line. In particular, it can be a high-voltage filter. By way of example, the filter 1 is configured for use in the automotive field, in particular in the case of hybrid and electric vehicles (xEV). The filter 1 can also be referred to as filter component 1.

(15) The filter 1 comprises connections L+ and L to a voltage supply (LINE) and connections L+ and L to a load (LOAD). The voltage supply is a high-voltage battery, for example. By way of example, the required voltage is 400 to 100 VDC. The load is the drive unit of a vehicle, for example. Furthermore, the filter 1 comprises a connection PE to a protective line or ground or housing.

(16) The filter 1 comprises a plurality of first and second capacitors 2, 3. The first capacitors 2 are interconnected between the connections L+, L, L+ and L. The second capacitors 3 are interconnected with respect to ground. Moreover, the filter 1 comprises a plurality of inductances 4 having magnet cores.

(17) The electrical component parts of the filter 1, in particular capacitors 2, 3 and inductances 4, can be arranged for shielding in a housing.

(18) In a high-temperature environment, such as e.g. in an xEV application, a high thermal stability of the filter 1 is necessary. The component parts, in particular the capacitors 2 and 3, should still be reliably usable at temperatures of greater than 85 C. By way of example, the component parts should be usable at least up to a temperature of 125 C., preferably at least up to 150 C.

(19) Required capacitance values for the first capacitors 2 are for example 100 nF to a few F, and for the second capacitors 3 are a few nF to 1 F, in particular 4.7 nF.

(20) FIG. 2 shows one embodiment of a multilayer ceramic capacitor 5 suitable for use in a high-temperature EMI filter. By way of example, one or a plurality of the capacitors 2, 3 in the EMI filter 1 from FIG. 1 are configured as a multilayer ceramic capacitor 5 of this type.

(21) The multilayer capacitor 5 comprises a main body 6. The main body 6 is configured as a ceramic chip. The main body 6 comprises a ceramic material.

(22) By way of example, a ceramic material of the following formula is used:
Pb.sub.(11.5a0.5b+1.5d+e+0.5f)A.sub.aB.sub.b(Zr.sub.1xTi.sub.x).sub.(1cdef)Li.sub.dC.sub.eFe.sub.fSi.sub.cO.sub.3+y.Math.PbO,
wherein A is selected from a group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb; B is selected from a group consisting of Na, K and Ag; C is selected from a group consisting of Ni, Cu, Co and Mn; and wherein it holds true that 0<a<0.12; 0.05x0.3; b<0.12; 0c<0.12; 0d<0.12; 0e<0.12; 0f<0.12; 0y<1, wherein b+d+e+f>0.

(23) By way of example, at least one of the following relationships holds true for the composition:
0.1<x<0.2;
0.001<b<0.12; and preferably d=e=f=0;
0.001<e<0.12; and preferably b=d=f=0.

(24) In particular, a PLZT (lead lanthanum zirconate titanate) ceramic can be used. In this case, therefore, A=La holds true in the formula above. Moreover, B=Na can hold true. By way of example, the material has the following composition: Pb.sub.0.87La.sub.0.07Na.sub.0.05Zr.sub.0.86Ti.sub.0.14O.sub.3.

(25) The composition of the ceramic is chosen in particular in such a way that the ceramic has an anti-ferroelectric behavior. The anti-ferroelectric behavior is described in greater detail in association with FIG. 7.

(26) Furthermore, the ceramic material has a high insulation capability at high temperature. By way of example, the following holds true for the product of insulation resistance R.sub.is and capacitance C: R.sub.isC>110.sup.4F at 150 C.

(27) The multilayer capacitor 5 comprises two connection contacts 7, 8, which are arranged at opposite side surfaces of the main body 6. The connection contacts 7, 8 are each configured in the form of bent contact metal sheets (leadframes). The connection contacts 7, 8 are bent outward, i.e. in a direction away from the main body 6. This shape of the connection contacts 7, 8 is also referred to as an L-shape.

(28) The connection contacts 7, 8 have connection regions 24, 25. The connection regions 24, 25 are arranged laterally with respect to the main body 6 in plan view.

(29) The connection contacts 7, 8 are configured for example for SMD mounting. By way of example, the connection contacts 7, 8, in particular the connection regions 24, 25, are connected to a printed circuit board by soldering. The connection regions 24, 25 are arranged at a distance from an underside of the main body 6 in a height direction, such that a free space is formed between the main body 6 and the printed circuit board. This enables improved heat dissipation.

(30) The printed circuit board is connected, in particular screwed, for example to a busbar of the EMI filter. The connection contacts 7, 8 comprise for example copper and/or a multilayered metal composite.

(31) The main body 6 has a length L, a height H and a width B. The length L is the extent of the main body 6 from a connection contact 7 to the opposite connection contact 8, the height H is the extent perpendicular to a printed circuit board and the width B is the extent in a direction perpendicular to the height H and perpendicular to the length L. By way of example, the height H is significantly less than the width B and the length L. By way of example, the length L is in the range of 6.0 mm to 8.0 mm. In particular, the length L can be 7 mm. By way of example, the width B is in the range of 7.0 mm to 9.0 mm. In particular, the width B can be 8 mm. By way of example, the height H is in the range of 2.0 and 4.0 mm. In particular, the height H can be 3.0 mm.

(32) The capacitors 2, 3 from FIG. 1 can also each comprise a plurality of ceramic bodies interconnected with one another. For this purpose, by way of example, a plurality of main bodies are arranged between two connection contacts (leadframes) and interconnected to form a capacitor unit.

(33) FIG. 3 shows a further embodiment of a multilayer ceramic capacitor 5 for an EMI filter, in which, in contrast to the multilayer capacitor from FIG. 2, the connection contacts 7, 8 are bent inward. The connection regions 24, 25 are situated below the main body 6 in plan view. The connection regions 24, 25 are at a distance from the main body 6 in the height direction. This shape of the connection contacts 7, 8 can be referred to as a J-shape.

(34) FIG. 4 shows the main body 6 in a sectional view. The main body 6 has a plurality of ceramic layers 9 and internal electrodes 10, 11, 12. Preferably, all the ceramic layers 9 and internal electrodes 10, 11, 12 are sintered jointly. The ceramic layers 9 have the composition described above. The internal electrodes 10, 11, 12 comprise copper or consist of copper with a high degree of purity.

(35) The first internal electrodes 10 are led as far as a side surface of the main body 6 and are electrically connected there to the first connection contact 7. The second internal electrodes 11 are led as far as an opposite side surface of the main body 6 and are electrically connected to the second connection contact 8.

(36) The first internal electrodes 10 are arranged in each case with a second internal electrode 11 on a common ceramic layer 9. Consequently, a first internal electrode 10 and a second internal electrode 11 are arranged in each case at the same height of the main body 6. The first internal electrodes 10 and the second internal electrodes 11 do not overlap in orthogonal projection.

(37) The third internal electrodes 12 are configured as so-called floating electrodes. The third internal electrodes 12 are electrically connected to none of the connection contacts 7, 8. The third internal electrodes 12 overlap the first and second internal electrodes 10, in orthogonal projection. The third internal electrodes 12 are arranged, in the stacking direction, alternately with the first and second internal electrodes 10, 11 situated on a common layer 9.

(38) The internal electrodes 10, 11 of opposite polarities are not led as far as a common side surface of the main body 6.

(39) The arrangement of the internal electrodes 10, 11, 12 and in particular the configuration of the floating internal electrodes 12 enable a particularly high capacitance density of the multilayer capacitor 5. Consequently, high capacitance values can be achieved in conjunction with a small structural size. By way of example, given an operating voltage of 400 V.sub.DC, it is possible to achieve capacitances of up to 1 F. Furthermore, the dielectric strength can be increased by this design. On account of the design, the ceramic layers 9 can have a smaller thickness and it is possible to achieve a higher breakdown strength.

(40) The main body 6 has one or more load relief regions 13, in which the ceramic layers 9 are not connected to one another. The load relief regions 13 serve for mechanical load relief of the multilayer capacitor 5 and thus contribute to increasing the mechanical stability. In particular, mechanical stresses can be reduced by the load relief regions 13. The load relief regions 13 can be formed circumferentially along the side surfaces of the main body 6.

(41) FIG. 5 shows an enlarged excerpt from FIG. 2 or 3, in which the securing of the first connection contact 7 to the main body 6 and the construction of the connection contact 7 can be seen in detail.

(42) The connection contact 7 has a multilayered construction. A first layer 14 comprises a first material having a particularly good electrical and thermal conductivity. This is copper, for example. The connection contact has a second layer 15 composed of a second material. The second material has a low coefficient of thermal expansion. Furthermore, the second layer 15 ensures for example the mechanical strength of the connection contact 7. By way of example, the second material is Invar, a specific iron-nickel alloy.

(43) The connection contact 7 can additionally have a third layer 16. The third layer 16 can comprise the same material as the first layer 14. A bimetallic behavior of the connection contact 7 can be prevented by the third layer 16.

(44) In particular, the connection contact 7 can have a CIC (copper-Invar-copper) layer construction.

(45) The second layer 15 is for example significantly thicker than the first layer 14 and the third layer 16. By way of example, the third layer 16 has the same thickness as the first layer 14. By way of example, the second layer 15 has a thickness of 90 m, the first layer 14 has a thickness of 30 m and the third layer 16 has a thickness of 30 m.

(46) The connection contact 7 can furthermore have one or more further layers 17, 18. The further layers 17, 18 form for example the outer sides of the connection contact 7. By way of example, electroplating layers these can be silver layers. The electroplating layers each have for example a thickness in the range of 5 m to 10 m. The further layers 17, 18 serve for example for passivation for the first and third layers 14, 16, respectively. In particular, these layers can provide start-up protection. Furthermore, these layers can provide solderable surfaces or improve the connection to a sintering material.

(47) In order to produce a connection contact 7, by way of example, the second layer 15 is provided and then there is arranged thereon the first layer 14 and, if appropriate, the third layer 16. The second layer 15 is provided in particular as a metal sheet. By way of example, the first and third layers 14 and 16 are rolled onto the second layer 15. Afterward, the electroplating layers 17, 18 are applied for example on both sides. From the multilayered metal sheet, for example, a piece is then stamped out and bent into a desired shape.

(48) The connection contact 7 is preferably secured to an external electrode 19 of the main body 6. The external electrode 19 directly adjoins the ceramic of the main body 6. The external electrode 19 comprises at least one sputtered layer, for example. The external electrode 19 can comprise a plurality of layers arranged one above another, in particular a plurality of sputtered layers. By way of example, a Cr/Ni/Ag layer construction can be involved. By way of example, the external electrode 19 has a thickness in the region of 1 m.

(49) The connection contact 7 is connected to the external electrode 19 by a connecting material 20. The connecting material 20 should have a high electrical and thermal conductivity. Furthermore, the connecting material 20 should have a high robustness vis--vis cyclic thermal loads and a high adhesive strength. By way of example, the connecting material 20 comprises a sintering material, in particular sintering silver. The connection contact 7 is then secured to the main body 6 by sintering, in particular low-temperature sintering, of the connecting material 20. In this case, sintering is understood to mean connecting whilst avoiding the liquid phase of the connecting material 20. The sintering is thus carried out as a diffusion process.

(50) By way of example, the sintering is carried out at a temperature of between 150 C. and 350 C., in particular between 200 C. and 300 C. By way of example, the connecting material 20 has a thickness in the region of 20 m.

(51) FIG. 6 shows an excerpt from a securing of a connection contact 7 of a multilayer capacitor 5 (FIGS. 2 and 3) to a printed circuit board 21 and a busbar 26. The connection contact 7 is configured for example as in FIG. 5. Not all possible layers of the connection contact 7 are illustrated, for reasons of clarity.

(52) The printed circuit board 21 is configured for example as an FR4 or ceramic substrate. The printed circuit board is connected to a busbar 26 of the EMI filter for example by means of a screw 27. The busbar 26 is configured for example as a metal sheet.

(53) The printed circuit board 21 has a contact region 22, to which the connection contact 7 is secured. By way of example, the contact region 22 is a soldering connection contact, a Cu contact or an NiAu contact. The connection contact 7 is sintered or soldered to the contact region by means of a connecting material 23. By way of example, sintering silver or an SAC solder is used as connecting material 23.

(54) Overall the multilayer capacitor 5 described above has a high thermal stability and a high robustness vis--vis moisture on account of its structural construction and its material. No additional sealing of the capacitor 5 is necessary, which contributes to the small installation size.

(55) FIG. 7 shows a profile of the capacitance C as a function of a DC voltage V.sub.DC for a multilayer capacitor for an EMI filter, for example in accordance with FIG. 3 or FIG. 4. The measurements were carried out for different layer thicknesses A, B, C of the dielectric. In this case, the solid lines are the measurement results for quasi-static hysteresis measurement, and the dashed lines at 1 kHz, 0.5 V.

(56) The multilayer capacitors have an anti-ferroelectric behavior. The capacitance rises as the voltage increases. The capacitance reaches a maximum and then falls again.

(57) For the ceramic material the dielectric constant behaves correspondingly as a function of the electric field. In the case of a ferroelectric behavior, the capacitance decreases beginning at V=0.

(58) The rise in the capacitance as the voltage increases takes place for example at least in a voltage range of between 200 V and 300 V. For all layer thicknesses A, B, C, as the voltage increases further the capacitance reaches a maximum and then decreases again. The maxima of the capacitances for all layer thicknesses A, B, C form at the same electric field strength, but at different voltages.

(59) FIG. 8 shows an interference voltage curve of an EMI filter comprising the multilayer capacitor 5 described above. The EMI filter has the construction from FIG. 1. Alternatively, the EMI filter can also be configured just as an LC stage having one inductance 4 and second capacitors 3.

(60) The measurements were carried out in accordance with the CISPR 25 standard. A peak (Pk), a quasi-peak (QP) and an average value (AV) measurement were carried out. The interference voltage U in dBpV is plotted against the frequency f in Hz. The respective limit values Pk.sub.L, AV.sub.L and QP.sub.L are additionally depicted.

(61) As can be seen in the diagram, the EMI filter has good filter properties in the entire frequency range, i.e. from the long-wave range to the VHF range.

(62) It has been found that, in particular, the capacitor from EPCOS AG sold under the product designation CeraLink is suitable for use in a DC EMI filter. By way of example, a CeraLink capacitor of the LP series (see, for example, product data sheet, version as of Feb. 8, 2016) can be used here. This capacitor was originally developed for DC link or snubber applications, and so the capacitor is optimized for high capacitor currents.

(63) It has now been found, surprisingly, that a capacitor of this type is also suitable for use in DC EMI filters and has particularly advantageous properties for this field of application as well. In the case of use in an EMI filter, the current-carrying capacity is rather of secondary importance. The capacitor should rather have a high dielectric strength, in particular even at high temperatures. This is the case for the CeraLink capacitor.

(64) FIG. 9 shows a capacitance-voltage diagram of two of the above-described multilayer ceramic capacitors C1, C2 in the case of operation as an EMI filter.

(65) The multilayer capacitors C1, C2 differ in their ceramic. The multilayer capacitor C1 comprises the material Pb.sub.0.87La.sub.0.07Na.sub.0.05Zr.sub.0.86Ti.sub.0.14O.sub.3. The multilayer capacitor C2 comprises the material Pb.sub.0.881La.sub.0.06Na.sub.0.058Zr0.90Ti.sub.0.10O.sub.3.

(66) In the case of use as an EMI filter, the capacitors C1, C2 are operated far below the switching field. By way of example, the applied DC voltage U.sub.bias is 400 V. The maximum of the capacitance is significantly higher, for example 1500 V.

(67) The capacitance C is somewhat below 40 nF for C1, and approximately 50 nF for C2. By adapting the ceramic material, the capacitance can thus be set to a required value.

(68) FIG. 10 shows a voltage-failure diagram of the multilayer ceramic capacitors C1, C2 from FIG. 9 in the case of voltage spikes. The voltage U is plotted against the failures A in %.

(69) A dielectric strength of 2500 V is achieved for both capacitors. In this case, the capacitor C2 has a higher dielectric strength than the capacitor C1.

(70) The lifetime can also be increased by using thicker ceramic layers, such that the layer thickness can also be optimized for adapting the lifetime.

(71) FIG. 11 shows a failure-time diagram of the multilayer ceramic capacitors C1, C2 from FIG. 9 in the HAL test (highly accelerated life-test) at a temperature of 200 C. and a voltage of 1200 V. The failures A in % are plotted against the time T in minutes. The capacitor C2 has a longer lifetime.

LIST OF REFERENCE SIGNS

(72) 1 Filter/filter component 2 First capacitor 3 Second capacitor 4 Inductance 5 Multilayer capacitor 6 Main body 7 First connection contact 8 Second connection contact 9 Ceramic layer 10 First internal electrode 11 Second internal electrode 12 Floating internal electrode 13 Load relief region 14 First layer 15 Second layer 16 Third layer 17 Further layer 18 Further layer 19 External electrode 20 Connecting material 21 Printed circuit board 22 Contact region 23 Connecting material 24 First connection region 25 Second connection region 26 Busbar 27 Screw L+ Connection to voltage supply L Connection to voltage supply L+ Connection to load L Connection to load PE Connection to protective line Pk Peak QP Quasi-peak AV Average value Pk.sub.L Limit value for Pk QP.sub.L Limit value for QP AV.sub.L Limit value for AV C1 Capacitor comprising first material C2 Capacitor comprising second material