SERIAL INTERFACE
20230025913 · 2023-01-26
Inventors
- Dominik Voglgsang (Binzen, DE)
- André Schaubhut (Schopfheim, DE)
- Christian Knapp (Albbruck, DE)
- Thomas Küng (Münchenstein, CH)
Cpc classification
G06F1/3209
PHYSICS
Y02D10/00
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
Abstract
An electronic unit comprises a microcontroller with a control input, a control output, and a signal input; and an interface circuit with a connection terminal, a control output, a control input, and a signal output. Both the microcontroller and the interface circuit each have a first operating mode and a second operating mode. The microcontroller is designed to cause the interface circuit to operate in its first operating mode. The interface circuit is designed to convert an input signal into a derivation signal representing a derivation of the input signal over time and to generate a control signal from the derivation signal. The microcontroller is designed to cause the interface circuit to operate in its second operating mode and to receive and convert a digital input signal and to output an output signal to the microcontroller.
Claims
1-29. (canceled)
30. An electronic unit, comprising: a microcontroller having a control input, a first control output, and a signal input designed as an asynchronous serial interface or as a switching input; and an interface circuit having a first connection terminal, a control output, a first control input, and a signal output, wherein the control output of the interface circuit is electrically connected to the control input of the microcontroller, the first control output of the microcontroller is electrically connected to the first control input of the interface circuit, and the signal output of the interface circuit is electrically connected to the microcontroller signal input, wherein the microcontroller and the interface circuit each have a first operating mode and a second operating mode, wherein the microcontroller is designed in the first operating mode to output at the first control output an instruction that causes the interface circuit to operate in its first operating mode, wherein the interface circuit is designed in the first operating mode to differentiate an input signal being applied at the first connection terminal, to convert the input signal into a derivation signal that represents a derivation of the input signal over time, and to generate a binary control signal using the derivation signal and output the binary control signal at the control output, wherein the interface circuit reacts to a change in a logic level of the input signal conforming especially to IEC 61158 CPF15:2007 and/or EIA-485, with a rate of change standardized to a logic level nominally to be achieved of more than 90%/μs, and/or to a signal edge of the input signal having an edge steepness of more than 1 V/μs with the encoding of an instruction into the control signal that causes the microcontroller to operate in its second operating mode or arranges for the microcontroller to switch from its first operating mode into its second operating mode, wherein the microcontroller is designed in the second operating mode to output at the first control output an instruction that causes the interface circuit to operate in its second operating mode, wherein the interface circuit is designed in the second operating mode to convert a digital input signal being applied at the first connection terminal and conforming to IEC 61158 CPF15:2007 and/or EIA-485 into a binary first output signal which represents the input signal and to output the first output signal at the signal output, and wherein the microcontroller is further designed in the second operating mode to receive and process a digital input signal being applied at the signal input and to execute an instruction contained in the input signal and/or to evaluate a message contained in the input signal.
31. The electronic unit according to claim 30, wherein the interface circuit is further designed, in the first operating mode, not to convert a digital input signal being applied at the first connection terminal into an output signal which represents this input signal nor to output any output signal which represents the digital input signal being applied at the first connection terminal at the signal output; and/or wherein the microcontroller is further designed to process, in the first operating mode, the control signal of the interface circuit being applied at the control input and to react to the instruction with a switch into the second operating mode; and/or wherein the microcontroller is further designed not to process a digital input signal being applied at the signal input in the first operating mode and not to carry out an instruction contained therein; and/or wherein the microcontroller is designed to switch from the second operating mode into the first operating mode in a time-controlled manner if no digital and/or UART-conforming input signal is being applied at the signal input; and/or wherein the interface circuit and the microcontroller are further designed to operate simultaneously in the respective second operating mode such that the first output signal at the signal output of the interface circuit forms the digital input signal being applied at the signal input of the microcontroller and such that the microcontroller receives and processes said first output signal.
32. The electronic unit according to claim 31, wherein the microcontroller has a signal output designed as an asynchronous serial interface, and the interface circuit has a signal input designed as an asynchronous serial interface, and wherein the signal output of the microcontroller is electrically connected to the signal input of the interface.
33. The electronic unit according to claim 32, wherein both the microcontroller and the interface circuit each have a third operating mode, wherein the microcontroller is designed to output, in the third operating mode, a digital second output signal at the signal output, and wherein the interface circuit is designed, in the third operating mode, to convert a digital input signal being applied at the signal input into a digital third output signal conforming to IEC 61158 CPF15:2007 and/or EIA-485.
34. The electronic unit according to claim 33, wherein the interface circuit has a second connection terminal, and wherein the interface circuit is designed to output, in the third operating mode, the third output signal at the second connection terminal.
35. The electronic unit according to claim 30, wherein the interface circuit is designed not to convert an input signal being applied at the signal input in the first operating mode and in the second operating mode into an output signal which represents the input signal nor to output at the second connection terminal any output signal which represents an input signal being applied at the signal input.
36. The electronic unit according to claim 33, wherein the interface circuit is designed to output, in the third operating mode, the third output signal at the first connection terminal.
37. The electronic unit according to claim 33, wherein the microcontroller has a second control output and the interface circuit has a second control input, and wherein the second control output of the microcontroller is electrically connected to the second control input of the interface circuit.
38. The electronic unit according to claim 33, wherein the microcontroller is designed to output, in the third mode of operation, an instruction that causes the interface circuit to operate in its third mode of operation at the second control output.
39. The electronic unit according to claim 33, wherein the microcontroller is designed to switch from the second into the third operating mode in a manner controlled by the input signal at the signal input; and/or wherein the microcontroller is designed to automatically switch from the third operating mode into the first operating mode after the output of the digital output signal at the signal output; and/or wherein the interface circuit in both the first operating mode and the second operating mode is designed not to convert a input signal being applied at the signal input into an output signal being applied at the signal input, nor to output at the first connection terminal any output signal which represents an input signal being applied at the signal input; and/or wherein the microcontroller is designed not to process a digital input signal being applied at the signal input in the third operating mode, and also in particular does not execute any instruction arriving at the signal input; and/or wherein the interface circuit and the microcontroller are designed to operate simultaneously in the respective third operating mode such that the second output signal forms, at the signal output of the microcontroller, the digital input signal being applied at the signal input of the interface circuit and such that the interface circuit receives and processes said second output signal and converts it into the third output signal.
40. The electronic unit according to claim 33, wherein the interface circuit has a transceiver compatible with IEC 61158 CPF15:2007 and/or EIA-485 and/or is monolithic, and wherein the first connection terminal of the interface circuit is formed by at least one of the BUS driver/receiver terminals of the transceiver, the signal output of the interface circuit is formed by a digital output of the transceiver, and the signal input of the interface circuit is formed by a digital input of the transceiver.
41. The electronic unit according to claim 30, wherein the interface circuit is designed to obtain the electrical power required both in the first operating mode and in the second operating mode exclusively from the input signal being applied at the first connection terminal.
42. The electronic unit according to claim 30, further comprising: a supply circuit formed by an electrochemical and/or rechargeable energy store, wherein the supply circuit has a first supply terminal and is designed to provide an operating voltage for the microcontroller at the first supply terminal, and wherein the microcontroller has a supply terminal which is electrically connected to the first supply terminal of the supply circuit.
43. The electronic unit according to claim 42, wherein the supply circuit has a second supply terminal and is designed to provide an operating voltage for the interface circuit at the second supply terminal, and wherein the interface circuit has a supply terminal electrically connected to the second supply terminal of the supply circuit.
44. The electronic unit according to either of claim 40, wherein the supply terminal of the interface circuit is formed by two supply terminals of the transceiver.
45. The electronic unit according to claim 44, wherein the interface circuit has an electronic main switch formed by a semiconductor relay or by an insulated-gate field-effect transistor, wherein both the first control input of the interface circuit and the supply terminal of the interface circuit are formed by the main switch.
46. The electronic unit according to claim 45, wherein the interface circuit has a galvanically isolated DC/DC voltage converter with a converter input and with a converter output, wherein the DC/DC voltage converter is designed to convert an input DC voltage being applied at the converter input into an output DC voltage being applied at the converter output with a voltage level that differs from a voltage level of the input DC voltage.
47. The electronic unit according to claim 46, wherein the converter input of the DC/DC voltage converter is electrically connected to the electronic main switch such that when the electronic main switch is connected conductively, the operating voltage for the interface circuit that is provided by the supply circuit is applied at the converter input.
48. The electronic unit according to claim 37, wherein the interface circuit comprises a first optocoupler with an optical transmitting element and an optical receiver element, wherein the control output of the interface circuit is formed by the first optocoupler such that its optical receiver element is electrically connected to the control input of the microcontroller.
49. The electronic unit according to claim 48, wherein the interface circuit includes a second optocoupler having an optical transmitting element and an optical receiver element, wherein the signal output of the interface circuit is formed by means of the second optocoupler in such a way that its optical receiver element is electrically connected to the signal input of the microcontroller.
50. The electronic unit according to claim 49, wherein the interface circuit includes a third optocoupler with an optical transmitting element and an optical receiver element.
51. The electronic unit according to claim 50, wherein the first control input of the interface circuit is formed by the third optocoupler such that its optical receiver element is electrically connected to the first control output of the microcontroller.
52. The electronic unit according to claim 50, wherein the second control input of the interface circuit is formed by the third optocoupler such that its optical transmitting element is electrically connected to the second control output of the microcontroller.
53. The electronic unit according to claim 52, wherein the interface circuit includes a fourth optocoupler having an optical transmitting element and an optical receiver element, wherein the signal input of the interface circuit is formed by the fourth optocoupler such that its optical transmitting element is electrically connected to the signal output of the microcontroller.
54. The electronic unit according to claim 30, wherein the interface circuit has a passive high-pass signal filter.
55. The electronic unit according to claim 30, wherein the interface circuit for differentiating the input signal being applied at the first connection terminal has a passive high-pass filter and/or a high-pass filter having a cut-off frequency of more than 800 Hz.
56. The electronic unit according to claim 30, wherein the interface circuit is designed to at least temporarily and/or at least partially obtain the required electrical power during operation from the input signal being applied at the first connection terminal, in particular to obtain said electrical power required namely in the first operating mode exclusively from the input signal being applied at the first connection terminal; and/or wherein in the first operating mode the interface circuit has a power requirement that is less than 50 mW; and/or wherein the interface circuit in the second operating mode has a power requirement which is higher than a power requirement which the interface circuit has in the first operating mode, in particular more than 300% of the power requirement of the interface circuit in the first operating mode and/or more than 150 mW.
57. A communication system comprising: an electronic unit, including: a microcontroller having a control input, a first control output, and a signal input designed as an asynchronous serial interface or as a switching input; and an interface circuit having a first connection terminal, a control output, a first control input, and a signal output, wherein the control output of the interface circuit is electrically connected to the control input of the microcontroller, the first control output of the microcontroller is electrically connected to the first control input of the interface circuit, and the signal output of the interface circuit is electrically connected to the microcontroller signal input, wherein the microcontroller and the interface circuit each have a first operating mode and a second operating mode, wherein the microcontroller is designed in the first operating mode to output at the first control output an instruction that causes the interface circuit to operate in its first operating mode, wherein the interface circuit is designed in the first operating mode to differentiate an input signal being applied at the first connection terminal, to convert the input signal into a derivation signal that represents a derivation of the input signal over time, and to generate a binary control signal using the derivation signal and output the binary control signal at the control output, wherein the interface circuit reacts to a change in a logic level of the input signal conforming especially to IEC 61158 CPF15:2007 and/or EIA-485, with a rate of change standardized to a logic level nominally to be achieved of more than 90%/μs, and/or to a signal edge of the input signal having an edge steepness of more than 1 V/μs with the encoding of an instruction into the control signal that causes the microcontroller to operate in its second operating mode or arranges for the microcontroller to switch from its first operating mode into its second operating mode, wherein the microcontroller is designed in the second operating mode to output at the first control output an instruction that causes the interface circuit to operate in its second operating mode; wherein the interface circuit is designed in the second operating mode to convert a digital input signal being applied at the first connection terminal and conforming to IEC 61158 CPF15:2007 and/or EIA-485 into a binary first output signal which represents the input signal and to output the first output signal at the signal output, and wherein the microcontroller is further designed in the second operating mode to receive and process a digital input signal being applied at the signal input and to execute an instruction contained in the input signal and/or to evaluate a message contained in the input signal; and a transducer electrically connected to the electronic unit, wherein the transducer is designed to transmit a digital signal conforming to IEC 61158 CPF15:2007, to the electronic unit.
58. A measuring system, comprising: an electronic unit, including: a microcontroller having a control input, a first control output, and a signal input designed as an asynchronous serial interface or as a switching input; and an interface circuit having a first connection terminal, a control output, a first control input, and a signal output, wherein the control output of the interface circuit is electrically connected to the control input of the microcontroller, the first control output of the microcontroller is electrically connected to the first control input of the interface circuit, and the signal output of the interface circuit is electrically connected to the microcontroller signal input, wherein the microcontroller and the interface circuit each have a first operating mode and a second operating mode, wherein the microcontroller is designed in the first operating mode to output at the first control output an instruction that causes the interface circuit to operate in its first operating mode, wherein the interface circuit is designed in the first operating mode to differentiate an input signal being applied at the first connection terminal, to convert the input signal into a derivation signal that represents a derivation of the input signal over time, and to generate a binary control signal using the derivation signal and output the binary control signal at the control output, wherein the interface circuit reacts to a change in a logic level of the input signal conforming especially to IEC 61158 CPF15:2007 and/or EIA-485, with a rate of change standardized to a logic level nominally to be achieved of more than 90%/μs, and/or to a signal edge of the input signal having an edge steepness of more than 1 V/μs with the encoding of an instruction into the control signal that causes the microcontroller to operate in its second operating mode or arranges for the microcontroller to switch from its first operating mode into its second operating mode, wherein the microcontroller is designed in the second operating mode to output at the first control output an instruction that causes the interface circuit to operate in its second operating mode; wherein the interface circuit is designed in the second operating mode to convert a digital input signal being applied at the first connection terminal and conforming to IEC 61158 CPF15:2007 and/or EIA-485 into a binary first output signal which represents the input signal and to output the first output signal at the signal output, and wherein the microcontroller is further designed in the second operating mode to receive and process a digital input signal being applied at the signal input and to execute an instruction contained in the input signal and/or to evaluate a message contained in the input signal; and a sensor electrically coupled to the electronic unit, wherein the microcontroller is designed to receive and evaluate, at least in the first operating mode, a sensor signal generated by means of the sensor, in particular to determine said measured values for at least one measured variable captured by means of the sensor.
Description
[0046] The figures show in detail:
[0047]
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[0050]
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[0052]
[0053] As can be seen from
[0054] According to a further embodiment of the invention, the microcontroller μC further comprises a signal output μC_tx, which is also designed, for example, as an asynchronous serial interface, and the interface circuit IF has a signal input IF_rx designed, for example similarly to the aforementioned signal output μC_tx, as an asynchronous serial interface. As shown in
[0055] In the electronic unit according to the invention, both the microcontroller μC and the interface circuit IF in each case have a first operating mode, namely an operating mode μC, or an operating mode IF.sub.I, and at least a second operating mode, namely an operating mode μC.sub.II or an operating mode IF.sub.II.
[0056] The microcontroller μC is in particular designed to output, in its first operating mode μC.sub.I, an instruction at the control output μC_ctl1 that causes the interface circuit to operate in its operating mode IF.sub.I, for example to switch into the operating mode IF.sub.I, or to activate the operating mode IF.sub.I. The aforementioned instruction can, for example, be a simple switching command or, for example, a statement to be executed in a program to be processed by the interface circuit IF. In addition, the microcontroller μC is also designed, in its second operating mode μC.sub.II, to output at the control output μC_ctl1 an instruction that causes the interface circuit IF to operate in its second operating mode IF.sub.II and to receive and process a digital input signal being applied at its signal input μC_rx and, for example, conforming to UART, especially in such a way that an instruction contained in the input signal being applied at the aforementioned signal input μC_rx, for example a simple switching command or a statement that influences the program running in the microcontroller μC, is executed by the microcontroller μC and/or a message contained in said input signal is evaluated by the microcontroller μC. For the aforementioned case in which the electronic unit is a component of a measuring system, the microcontroller μC can also be designed, at least in its first operating mode μC.sub.I, but, for example, also both in operating mode μC.sub.I and in operating mode μC.sub.II, to receive and evaluate the aforementioned sensor signal s1 generated by means of the sensor MA, for example, to determine measured values for the at least one measured variable captured by means of the sensor MA.
[0057] In the electronic unit according to the invention, the interface circuit IF is in turn designed, at least in the first operating mode IF.sub.I, to differentiate the input signal e1 being applied at its connection terminal IF_ext1, namely, as also shown in
[0058] According to a further embodiment of the invention, the interface circuit IF is designed especially to encode the aforementioned instruction IRQ into the control signal at the control output IF_ctl or to output said control signal at least temporarily with a corresponding signal level at the control output IF_ctl if the rate of change of the input signal e1 corresponds to a signal edge having an edge steepness of more than 1 V/μs and/or to a rate of change of more than 90%/μs which is standardized to the nominally achievable logic level and/or if the rate of change of the input signal e1 corresponds to a change in a logic level of a digital input signal conforming to industry standard IEC 61158 CPF15:2007 (MODBUS) and/or EIA-485. According to a further embodiment of the invention, the interface circuit IF is also designed to output the derivation signal a1 directly as a control signal at the control output IF_ctl. For differentiating the input signal e1 or for generating the derivation signal a1, the interface circuit can have, for example, a corresponding signal filter, for example a high-pass filter of the first or possibly also of a higher order. A (lower) cut-off frequency of such a high-pass filter can be set for example to higher than 800 Hz, not least in the case of a use for a digital input signal conforming to industry standard IEC 61158 CPF15:2007 and/or EIA-485. Furthermore, the interface circuit IF of the electronic unit according to the invention is also designed, in its second operating mode IF.sub.II to convert a digital input signal being applied at the connection terminal IF_ext1 that conforms, for example, to IEC 61158 CPF15:2007 and/or EIA-485, for example, namely the aforementioned input signal e1, into a binary first output signal sD1 which represents this input signal and to output said output signal sD1 at the signal output IF_tx in such a way that the output signal sD1 is applied at the signal input μC_rx of the microcontroller μC or forms the aforementioned input signal at the signal input μC_rx of the microcontroller μC. Accordingly, the interface circuit IF and the microcontroller μC are also designed, according to a further embodiment of the invention, to at least temporarily operate at the same time in the respective second operating mode IF.sub.II or μC.sub.II, especially in such a way that the output signal at the signal output IF_tx of the interface circuit IF forms the digital input signal being applied at the signal input pc_rx of the microcontroller μC, and in such a way that the microcontroller μC receives and processes said first output signal. According to a further embodiment of the invention, the interface circuit is also designed, in its operating mode IF.sub.I, to block a digital input signal being applied at the connection terminal IF_ext1, namely not to convert the output signal into a signal which represents this input signal nor to output any output signal at the signal output IF_tx, which represents a digital input signal being applied at the connection terminal IF_ext1, and/or the microcontroller μC is designed, in its operating mode μC.sub.I to block a digital input signal being applied at the signal input μC_rx, namely not to process, especially not to execute instructions contained therein. In addition, the microcontroller μC can advantageously also be designed to switch from its operating mode μC.sub.II into its operating mode μC.sub.I in a time-controlled manner, not least for the case in which no digital input signal and/or no input signal conforming to UART is being applied at the signal input μC_rx.
[0059] For the aforementioned case in which the microcontroller μC has a signal output μC_tx and the interface circuit IF has a signal input IF_rx electrically connected to said signal output μC_tx, according to a further embodiment of the invention, both the microcontroller μC and the interface circuit IF each have also at least a third operating mode, namely an operating mode μC.sub.III μC or an operating mode IF.sub.III. The microcontroller μC, as is also indicated in
[0060] Not least for the case in which the aforementioned transducer NLU is designed both to emit the input signal e1 and to receive the output signal sD3 via signal line 2L and process them accordingly, the communication system thus formed is consequently provided in order to exchange data between electronic unit and transducer NLU in an alternating mode (half-duplex), and the interface circuit is further designed in its operating mode IF.sub.III to output the output signal sD3 at the connection terminal IF_ext1. Alternatively, the interface circuit IF, as also indicated in
[0061] According to a further embodiment invention, the microcontroller μC is additionally designed to switch from the second operating mode μC.sub.II into the third operating mode μC.sub.III in a manner controlled by the input signal sD1 at the signal input μC_rx, for example in order to confirm an execution of an instruction encoded in the input signal sD1 and/or to respond accordingly to a request explicitly contained in the input signal sD1 or at least implicitly transmitted therewith, for example by means of the output signal sD2. As an alternative or in addition, the microcontroller μC can also be designed to switch automatically from the operating mode μC.sub.III back into the operating mode μC.sub.I after the digital output signal sD2 is output at the signal output μC_tx. Advantageously, the interface circuit IF can, furthermore, also be designed, both in its operating mode IF, and in its operating mode IF.sub.II to block any input signal being applied at the signal input IF_rx, namely, not to convert it into an output signal which represents this input signal nor to output any output signal at the connection terminal IF_ext1 which represents an input signal being applied at the signal input IF_rx, and/or the microcontroller μC can be designed in operating mode μC.sub.III not to process any digital input signal being applied at the signal input μC_rx nor to execute any instruction arriving at the signal input.
[0062] According to a further embodiment of the invention, the microcontroller μC further comprises a second control output μC_ctl2, and the interface circuit IF has a second control input IF_sw2 electrically connected to said control output μC_ctl2. For the aforementioned case, in which the microcontroller μC and interface circuit IF each also have the third operating mode, the microcontroller μC is additionally designed in its operating mode μC.sub.III to output an instruction at control output μC_ctl2, which in turn causes the interface circuit IF to operate in its operating mode IF.sub.III, also in such a manner, for example, that the microcontroller μC in the operating mode μC.sub.III, both at the control output μC_ctl2 and at the control output μC_ctl1, outputs a corresponding instruction for the operating mode μC.sub.iii and interface circuit IF.
[0063] For receiving and processing at least the digital input signal e1 arriving at the connection terminal IF_ext1, the interface circuit IF has, according to a further embodiment of the invention, a transceiver RS485 that is compatible with, for example, industry standard IEC 61158 CPF15:2007 and/or EIA-485 and/or is monolithic. The same transceiver RS485 can, for example, be a monolithic, in some cases also error-protected RS485 transceiver, for example an SN65HVD1781 from Texas Instruments Inc., Dallas, Tex. 75265, 2019 or a THVD2450 from Texas Instruments Inc., Dallas, Tex. 75265, 2019. Furthermore, it is further provided that, as is also shown schematically in
[0064] In order to provide the electrical power P1 required by the microcontroller μC during operation, the electronic unit according to a further embodiment of the invention also has a supply circuit NRG with at least one first supply terminal U1. In addition, the microcontroller μC also has a corresponding supply terminal which is additionally electrically connected to the supply terminal U1 of the supply circuit NRG. The supply circuit NRG formed, for example, by means of an electrochemical and/or rechargeable energy store is additionally designed to provide an operating voltage for the microcontroller μC, for example, a unipolar or bipolar DC voltage, at the supply terminal U1. In contrast thereto, the interface circuit IF is designed to obtain the electrical power required during operation or the corresponding auxiliary power, at least at times and/or at least in part, from the input signal e1 being applied at its connection terminal IF_ext1. For this purpose, the aforementioned signal filter which is used for differentiating the input signal e1 can advantageously also be a passive signal filter, for example namely a passive high-pass filter formed by means of a simple series circuit of one or more ohmic resistors, in some cases also acting as current-limiting resistors.
[0065] According to a further embodiment of the invention, the interface circuit has in its operating mode IF.sub.I a power requirement that is less than 50 mW, and/or the interface circuit IF is designed to obtain the electrical power required both in its operating mode IF.sub.I and in its operating mode IF.sub.II, in each case exclusively from the input signal e1 being applied at the connection terminal IF_rx. The interface circuit IF can in particular also be designed as a passive component of the electronic unit, namely can be configured to obtain the electrical power P2 required during operation fully or exclusively from the input signal e1 being applied at its connection terminal IF_ext1. Alternatively, the interface circuit IF can, however, also be designed to obtain the electrical power required during operation or auxiliary power proportional to the supply circuit NRG, and the supply circuit NRG, as also indicated in
[0066] In order to provide the electrical power P2* also required during operation by the interface circuit, the supply circuit NRG according to a further embodiment of the invention accordingly has a second supply terminal U2 at which, during operation, an operating voltage for the interface circuit IF, for example a unipolar or bipolar DC voltage, is temporarily provided, and the interface circuit IF accordingly also has a supply terminal which is electrically connected to the supply terminal U2 of the supply circuit NRG. Not least for the aforementioned case that the transceiver RS485 is provided in the interface circuit IF, the supply terminal of the interface circuit IF, as is also indicated in
[0067] According to a further embodiment of the invention, an electronic main switch HS is also provided in the interface circuit IF, and the control input IF_sw1 of the interface circuit IF is also formed by means of the main switch HS or a control electrode thereof. The main switch HS can, for example, be formed by means of a semiconductor relay (solid state relay) or by means of an insulated-gate field-effect transistor (IGFET), for example an n-channel MOSFET (NMOS) or another metal oxide semiconductor field-effect transistor (MOSFET). As indicated in
[0068] For the aforementioned case that the interface circuit IF has the DC/DC voltage converter, the converter input of the DC/DC voltage converter can be electrically connected to the electronic main switch HS, for example in such a way that, when the electronic main switch HS is switched on at the converter input, the operating voltage for the interface circuit IF that is provided by the supply circuit NRG is being applied as input voltage of the DC/DC voltage converter for the interface circuit IF.
[0069] According to a further embodiment of the invention, the interface circuit IF has at least one first optocoupler OK1 with an optical transmitting element and an optical receiver element. As shown schematically in