Thin film transistor with source electrode, drain electrode and active layer prepared in a same layer and method for manufacturing the same, array substrate and display device

Abstract

A thin film transistor and manufacturing method thereof, an array substrate and a display device are disclosed. The thin film transistor includes a source electrode, a drain electrode and an active layer; the source electrode, the drain electrode and the active layer are disposed in a same layer, the source electrode and the drain electrode are separately joined to the active layer through their respective side faces, a material of the source electrode and the drain electrode is metal, and a material of the active layer is a metal oxide semiconductor in correspondence with material of the source electrode and the drain electrode. With the thin film transistor, procedures can be decreased, thereby reducing costs.

Claims

1. A manufacturing method of a thin film transistor, comprising a step of forming a source electrode, a drain electrode and an active layer in a same layer, wherein the step of forming the source electrode, the drain electrode and the active layer lying in the same layer includes: forming a metal thin film; forming a pattern of the source electrode, the drain electrode and the active layer by a metal thin film; forming a stop layer to cover a source region and a drain region, and to expose an active layer region; and converting part or all of the metal thin film in the active layer region into a metal oxide semiconductor, and removing the stop layer in the source region and the drain region, thereby forming the source electrode, the drain electrode and the active layer eventually.

2. The manufacturing method of the thin film transistor claimed as claim 1, wherein a material of the metal thin film is a monolayer or a stack of any one or more of metals selected from the group consisting of indium, gallium, zinc, ti molybdenum or tungsten or any alloy thereof.

3. The manufacturing method of the thin film transistor claimed as claim 1, wherein the pattern of the source electrode, the drain electrode and the active layer is formed by the metal thin film with a same one patterning process.

4. The manufacturing method of the thin film transistor claimed as claim 1, wherein photoresist is used for the stop layer.

5. The manufacturing method of the thin film transistor claimed as claim 1, wherein photoresist is used for the stop layer, and a half-tone or gray-tone mask manner is adopted to simultaneously form the pattern of the source electrode, the drain electrode and the active layer and to distinguish the source region and the drain region that are required to be covered and the active layer region that is required to be exposed.

6. The manufacturing method of the thin film transistor claimed as claim 1, wherein part of all of the metal in the active layer region is converted into a metal oxide semiconductor by way of heat treatment.

7. The manufacturing method of the thin film transistor claimed as claim 6, wherein the heat treatment is carried out under an oxygen atmosphere.

8. The manufacturing method of the thin film transistor claimed as claim 6, wherein the heat treatment is carried out under an oxygen gas atmosphere, or carried out under a nitrogen gas or inert gas atmosphere, which contains oxygen gas.

9. The manufacturing method of the thin film transistor claimed as claim 1, further comprising steps of forming a gate electrode and a gate insulating layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In order to illustrate the technical solution of the embodiments of the invention more clearly, the drawings of the embodiments will be briefly introduced below; it is obvious that the drawings as described below are only related to some embodiments of the invention, but not imitative of the invention.

(2) FIG. 1a is a first schematic view illustrating a thin film transistor according to an embodiment of the invention;

(3) FIG. 1b is a second schematic view illustrating a thin film transistor according to an embodiment of the invention;

(4) FIG. 2a to FIG. 2d are schematic views 1 (top views) illustrating steps of manufacturing a thin film transistor according to an embodiment of the invention; FIG. 2a is about formation of a metal thin film; FIG. 2b is about simultaneous formation of pattern of a source electrode, a drain electrode and an active layer by the metal thin film; FIG. 2c is about formation of a stop layer covering a source region and a drain region, with an active layer region being exposed; FIG. 2d is about formation of the source electrode, the drain electrode and the active layer;

(5) FIG. 3a to FIG. 3d are schematic views 2 (sectional views) illustrating steps of manufacturing a thin film transistor according to an embodiment of the invention; FIG. 3a is about formation of a metal thin film; FIG. 3b is about formation of photoresist on the metal thin film; FIG. 3c is about conduction of exposure and development on the photoresist with a dual-tone mask process; FIG. 3d is about formation of a stop layer 7 by removing the photoresist with a smaller thickness through an asking process, with the metal thin film in an active layer region 3a being exposed, and with a source region 1a and a drain region 2a being covered by the stop layer 7;

(6) FIG. 4a is a first schematic view illustrating an array substrate according to an embodiment of the invention; and

(7) FIG. 4b is a second schematic view illustrating an array substrate according to an embodiment of the invention.

REFERENCE NUMERALS

(8) 1source electrode; 2drain electrode; 3active layer; 4gate insulating layer; 5gate electrode; 6substrate; 7stop layer; 8photoresist; 9passivation layer; 10pixel electrode; 11protective layer; 30metal thin film; 1asource region; 2adrain region; 3aactive layer region; 8aphotoresist with a larger thickness; 8bphotoresist with a smaller thickness; 30apattern of a source electrode, a drain electrode and an active layer; 1bside face of a source electrode; 2bside face of a drain electrode

DESCRIPTION OF THE PREFERRED EMBODIMENTS

(9) In order to make objects, technical details and advantages of the embodiments of the invention apparent, hereinafter, the technical solutions of the embodiments of the invention will be described in a clearly and fully understandable way in connection with the drawings related to the embodiments of the invention. It is obvious that the described embodiments are just a part but not all of the embodiments of the invention. Based on the described embodiments of the invention, those ordinarily skilled in the art can obtain other embodiment(s), without any inventive work, which should be within the scope sought for protection by the invention.

(10) It shall be understood that, in the present disclosure, same layer refers to a layer structure that is formed by same one patterning process with the same mask after a film layer for forming a specific pattern is formed by using same one film forming process. That is, one patterning process corresponds to one mask (also called as photomask). As for different specific patterns, one patterning process may include plural processes of exposure, development or etching, while the formed specific pattern in the layer structure may be continuous or discontinuous, and the specific pattern may further be at different heights or have different thicknesses.

(11) For the sake of clarity, in drawings for illustrating embodiments of the present invention, the thickness of layers or regions is magnified. It is understandable that when an element such as a layer, film, region, or substrate is referred to as being disposed, formed (or a similar term) on another element, it can be directly disposed or formed on the other element, or intervening elements may also be present.

(12) The present disclosure will be mainly described in detail by taking a bottom-gate type thin film transistor as an example, but the thin film transistor in the present disclosure may also be of a top-gate type, a dual-gate type or the like. The protection scope of the present invention is not limited to these specific structures.

(13) In the present disclosure, a source electrode, a drain electrode and an active layer that are disposed in a same layer and a manufacturing method for the structure will be mainly described in detail, and other elements and the manufacture process thereof can be referred to the usual manufacturing method if there is no relevant descriptions.

(14) A semiconductor device and a manufacturing method thereof are disclosed by a patent application document CN 102194893A (application number: 201110144092.7), and an example of the manufacturing process in which a first thin film transistor 430 for a driving circuit and a second thin film transistor 170 for a pixel portion (also called as a matrix circuit) are formed on the same substrate is disclosed in paragraphs [0075] to [0111] of the specification. As shown in FIG. 1A to FIG. 1D in CN102194893A, a thin film transistor in which a metal thin film of indium formed on a gate insulating layer 403 and an oxide semiconductor layer (a first InGaZnO based non-single-crystal film serving as the oxide semiconductor layer) disposed on the metal thin film of indium are subjected to heat treatment, so as to form a stack of indium oxide and the oxide semiconductor layer (a first InGaZnO based non-single-crystal film serving as the oxide semiconductor layer), on the indium oxide, for functioning as a channel forming region. For example, it is preferable that, from 200 C. to 600 C., usually 300 C. to 500 C., a heat treatment (which may be an annealing treatment with light illumination) is performed. The heat treatment is performed for 1 hour under the atmosphere of nitrogen gas at 350 C. in a furnace. The heat treatment is an oxidizing treatment in which a metal thin film 470 is oxidized partially or wholly. The metal thin film 470 is modified to be an indium oxide film, and then a first oxide semiconductor layer 471 that forms a stack functions as a channel forming region.

(15) According to an embodiment of the present invention, there is provided a thin film transistor, as shown in FIG. 1a and FIG. 1b, which includes a source electrode 1, a drain electrode 2 and an active layer 3. The source electrode 1, the drain electrode 2 and the active layer 3 are disposed in the same layer, the source electrode 1 and the drain electrode 2 are separately joined to the active layer 3 through their respective side faces 1b and 2b, the material of the source electrode 1 and the drain electrode 2 is metal, and the semiconductor material of the active layer 3 is a metal oxide semiconductor in correspondence with the metallic material of the source electrode 1 and the drain electrode 2.

(16) For example, the source electrode 1, the drain electrode 2 and the active layer 3 are prepared by the same layer of a metal thin film, and the metal oxide semiconductor is obtained by oxidizing the metal thin film. For example, the source electrode 1, the drain electrode 2 and the active layer 3 have surfaces that are substantially flush with each other, and the structure obtained thereby can have a flat morphology.

(17) For example, when the metallic material of the source electrode 1 and the drain electrode 2 is selected, it should be noted that the material must be able to be formed into an oxide semiconductor by a subsequent process. For example, the metal may be a monolayer or a stack of any one or more of the metals selected from the group consisting of indium, gallium, zinc, tin, molybdenum, tungsten or the like or any alloy thereof.

(18) For example, the source electrode 1, the drain electrode 2 and the active layer 3 arranged in the same layer may be directly disposed on a substrate 6, or disposed on the substrate 6 through a middle layer such as a buffer layer.

(19) For example, the thin film transistor further includes a gate electrode 5 and a gate insulating layer 4, and the thin film transistor may be a bottom-gate construction. As shown in FIG. 1a, the gate electrode 5 is disposed on the substrate 6, the gate insulating layer 4 is disposed on the gate electrode 5, and the source electrode 1, the drain electrode 2 and the active layer 3 arranged in the same layer are disposed on the gate insulating layer 4.

(20) For example, the thin film transistor may be a top-gate construction as well. As shown in FIG. 1b, the source electrode 1, the drain electrode 2 and the active layer 3 arranged in the same layer are disposed on the substrate 6, the gate insulating layer is disposed on the source electrode 1, the drain electrode 2 and the active layer 3, and the gate electrode 5 is disposed over the gate insulating layer 4.

(21) According to an embodiment of the invention, there is further provided a manufacturing method of a thin film transistor. As shown in FIGS. 2a to 2d, the method includes a step of forming a source electrode 1, a drain electrode 2 and an active layer 3 lying in the same layer; an example of the step of forming the source electrode 1, the drain electrode 2 and the active layer 3 lying in the same layer includes: step S1): forming a metal thin film 30; step S2): forming a pattern 30a of a source electrode, a drain electrode and an active layer by the metal thin film 30; step S3): forming a stop layer to cover a source region 1a and a drain region 2a, and to expose an active layer region 3a; step S4): modifying part or all of the metal in the active layer region 3a into a metal oxide semiconductor, and removing the stop layer on the source region 1a and the drain region 2a, eventually forming the source electrode 1, the drain electrode 2 and the active layer 3.

(22) The resultant source electrode 1 and drain electrode 2 are separated by the active layer 3, so that they are insulated from each other in a cut-off state of the fabricated thin film transistor.

(23) With the stop layer being provided, a source region and a drain region that are covered by the stop layer can be prevented from being oxidized.

(24) For example, the material of the metal thin film may be a monolayer or a stack of any one or more of the metals selected from the group consisting of indium, gallium, zinc, tin, molybdenum, tungsten or the like or any alloy thereof. When the material of the source electrode 1 and the drain electrode 2 is selected, it should be noted that the material must be able to be formed into an oxide semiconductor by a subsequent process.

(25) For example, the metal thin film may be formed by a sputtering method, a vacuum vapor deposition method or a coating method. For example, the thickness of the metal thin film is larger than 0 and smaller than or equal to 10 nm, and for example, it may be in the range of 3 to 5 nm.

(26) For example, it is possible that the pattern 30a of the source electrode, the drain electrode and the active layer is formed by the metal thin film 30 by using the same one patterning process in the step S2).

(27) For example, when part or all of metal in the active layer region is turned into the metal oxide semiconductor, a layer of photoresist may be used as the stop layer to cover the source region and the drain region. Certainly, it is also possible that other material usable for preventing the metal from turning into a metal oxide, such as, silicon oxide, silicon nitride or other inorganic material, or resin or other organic material, is used as the stop layer.

(28) For example, the process of turning part of all of metal in the active layer region into a metal oxide semiconductor may be conducted by means of heat treatment, but is not limited to heat treatment, and other method may also be adopted if the metal can be turned into a metal oxide semiconductor with the method.

(29) For example, the heat treatment is conducted under an oxygen atmosphere. Further, the heat treatment mode may be conducted as follows: the heat treatment may be carried out under an oxygen gas atmosphere, or the heat treatment may be carried out under an oxygen-containing nitrogen gas or inert gas (rare gas, the same below) atmosphere. For example, argon gas or the like may be used as the inert gas (rare gas).

(30) For example, temperature, time (period), and other process parameters of the heat treatment may be determined according to the stop layer used for covering the source region and the drain region. For example, the temperature of the heat treatment is lower than the thermal performance (e.g., heat-resisting temperature, etc., the same below) of the stop layer that covers the source region and the drain region, and the stop layer that covers the source region and the drain region can possess a better adhesion upon heat treatment, and can cover the source region and the drain region favorably, so that the regions are not oxidized.

(31) For example, in the step S1) in the above method, the metal thin film 30 is directly formed on the substrate 6 or formed on the substrate 6 through a middle layer such as a buffer layer or the like.

(32) For example, in a sputtering method, with the use of a light-shading mask whose zone except for a desired zone is covered, the metal thin film 30 may be merely formed in the desired zone.

(33) For example, when photoresist is used as the stop layer for covering the source region and the drain region, a Half-tone mask or Gray-tone mask may be used to simultaneously form a pattern 30a of a source electrode, a drain electrode and an active layer and to distinguish a source region 1a and a drain region 2a that are required to be covered and an active layer region 3a that is required to be exposed (namely, distinguish an area required to be oxidized and an area not required to be oxidized).

(34) Hereinafter, specific embodiments of the thin film transistor and manufacturing method thereof will be given with reference to FIGS. 2a to 2d.

Embodiment 1

(35) As shown in FIGS. 2a to 2d, the manufacturing method of the thin film transistor includes a step of forming a source electrode, a drain electrode and an active layer lying in the same layer; the step of forming the source electrode, the drain electrode and the active layer lying in the same layer includes the following:

(36) Step S1); a metal thin film 30 is formed, as shown in FIG. 2a.

(37) For example, the material of the metal thin film may be a monolayer or a stack of any one or more of the metals selected from the group consisting of indium, gallium, zinc, tin, molybdenum, tungsten or the like or any alloy thereof. In the present embodiment, an InGaZn (IGZ) metal thin film will be given as an example. For example, it is possible that the InGaZn metal thin film is formed by a sputtering method with the use of a metal target containing In, Ga and Zn. For example, the thickness of the metal thin film is larger than 0 and smaller than or equal to 10 nm, and for example, it may be in the range of 3 to 5 nm.

(38) For example, the metal thin film 30 is formed on a substrate 6. A number of intermediate elements may be provided between the metal thin film 30 and the substrate 6. For example, the metal thin film 30 may be formed on a gate insulating layer 4 or formed on the substrate with a layer of silicon nitride (SiNx) thin film and/or silicon dioxide (SiO.sub.2) thin film being deposited on its surface to serve as a stop layer, but the forming position of the metal thin film 30 is not limited thereto.

(39) For example, the substrate 6 is a transparent, insulating substrate, and it may be a glass substrate or quartz substrate, or of other suitable material.

(40) Step S2): a pattern 30a of a source electrode, a drain electrode and an active layer is formed by the metal thin film 30 at the same time, as shown in FIG. 2b.

(41) For example, it is possible that a photoresist pattern is formed on the metal thin film 30 to serve as an etching mask, and then the metal thin film on which the photoresist pattern has been formed is subjected to an etching process, so as to simultaneously form the pattern 3a of the source electrode, the drain electrode and the active layer.

(42) For example, a dry etching or wet etching process may be used for etching.

(43) Alternatively, it is possible that a sputtering method, with a light-shading mask whose zone except for a desired zone is covered, is used to merely form the metal thin film in the desired zone.

(44) For example, a photoresist pattern is formed on a substrate 6 with a buffer layer deposited on its surface or on a gate insulating layer 4 is formed, the photoresist pattern which corresponds to a zone other than the zone in which a pattern 30a of a source electrode, a drain electrode and an active layer is formed; a metal thin film 30 is formed by a sputtering method, the photoresist and the metal thin film on the photoresist are removed, and the pattern 30a of the source electrode, the drain electrode and the active layer can be thus formed.

(45) Step S3): a stop layer is formed to cover a source region 1a and a drain region 2a, and to expose an active layer region 3a, as shown in FIG. 2c.

(46) For example, a photoresist pattern is formed on the pattern 30a of the source electrode, the drain electrode and the active layer to serve as a stop layer, the photoresist in the active layer region 3a is removed by development and the underlying metal layer is exposed, and the source region 1a and the drain region 2a are still covered by the photoresist;

(47) Step S4): part of all of the metal in the active layer region 3a is modified into a metal oxide semiconductor, and then the photoresist is stripped off. Namely, the stop layer that covers the source region 1a and the drain region 2a is removed, and a source electrode 1, a drain electrode 2 and an active layer 3 are ultimately formed, as shown in FIG. 2d.

(48) For example, part or all of the metal in the active layer region may be modified into a metal oxide semiconductor by means of heat treatment, so that IGZ is converted into a metal oxide semiconductor IGZO. However, the converting treatment is not limited to heat treatment, other method may also be adopted if the metal can be converted into a metal oxide semiconductor by the method.

(49) For example, the heat treatment is conducted under an oxygen atmosphere. Further, the heat treatment method may be as follows: the heat treatment may be carried out under an oxygen gas atmosphere, and the heat treatment may also be carried out under a nitrogen gas or inert gas atmosphere, which contains oxygen gas. For example, the heat treatment may be carried out under an argon gas atmosphere, which contains oxygen gas.

(50) For example, the temperature of the heat treatment may be in the range of 80 to 250 C., and for example, it may be in the range of 100 to 150 C. The time may be in the range of 0.5 to 2 h, and for example, it may be in the range of 0.5 to 1 h. The temperature and the time of heat treatment here are merely illustrative examples, and the temperature, time and other process parameters of the heat treatment can be determined according to the stop layer used for covering a source region and a drain region. For example, the temperature of the heat treatment is lower than the thermal performance of the stop layer that covers the source region and the drain region, and the stop layer that covers the source region and the drain region can possess a better adhesion upon heat treatment and can cover the source region and the drain region favorably as long as the regions are not oxidized.

(51) For example, the manufacturing method of the thin film transistor further include steps of forming a gate electrode 5 and a gate insulating layer 4.

(52) For example, the thin film transistor may be a bottom-gate construction. As shown in FIG. 1a, the gate electrode 5 is disposed on the substrate 6, the gate insulating layer 4 is disposed on the gate electrode 5, and the source electrode 1, the drain electrode 2 and the active layer 3 arranged in the same layer are disposed on the gate insulating layer 4.

(53) For example, the thin film transistor may be a top-gate construction as well. As shown in FIG. 1b, the source electrode 1, the drain electrode 2 and the active layer 3 arranged in the same layer are disposed on the substrate 6, the gate insulating layer 4 is disposed on the source electrode 1, the drain electrode 2 and the active layer 3, and the gate electrode 5 is disposed over the gate insulating layer 4.

(54) For example, the gate electrode 5 may be a single-layered structure formed of any one selected from the group consisting of molybdenum (Mo), alloy of molybdenum and niobium, aluminum (Al), alloy of aluminum and neodymium (AINd), titanium (Ti) and copper (Cu) or a laminated structure formed of several ones among the metals, or a laminated structure obtained in such a way that its sub-layers are formed of molybdenum/aluminum/molybdenum (Mo/Al/Mo) or titanium/aluminum/titanium (Ti/Al/Ti). For example, the thickness range of the gate electrode 5 may be 200 nm to 500 nm.

(55) For example, the gate insulating layer 4 may be formed of a transparent material, and for example, silicon oxide, silicon nitride (SiNx), hafnium oxide, silicon oxynitride, aluminum oxide or the like may be adopted.

(56) Hereinafter, with the structure of the thin film transistor shown in FIG. 1a as an example, the manufacturing method of the thin film transistor in the embodiment will be described with reference to FIGS. 3a to 3d.

Embodiment 2

(57) As shown in FIGS. 3a to 3d, the manufacturing method of the thin film transistor includes a step of forming a source electrode, a drain electrode and an active layer lying in the same layer. Firstly, a gate thin film (e.g., a metal thin film of aluminum or an alloy of aluminum) is formed on a substrate, and formed into a gate line and a gate electrode 5 through a patterning process; next, a gate insulating layer 4 is formed on the gate line and the gate electrode 5 by a chemical vapor deposition or other process, then, a source electrode 1, a drain electrode 2 and an active layer 3 lying in the same layer are formed, and this step is such as carried out as follows:

(58) Step S1): a metal thin film 30 is formed on the gate insulating layer 4, as shown in FIG. 3a.

(59) The material of the metal thin film may be a monolayer or a stack of any one or more of metals selected from the group consisting of indium, gallium, zinc, tin, molybdenum or tungsten or of any alloy thereof. In the present embodiment, a metal thin film of In is given as an example.

(60) For example, it is possible that the metal thin film of In is formed by way of sputtering with a metal target of In. For example, the thickness of the metal thin film is larger than 0 and smaller than or equal to 10 nm, and for example, it may be in the range of 3 to 5 nm.

(61) Step S2): a pattern of a source electrode, a drain electrode and an active layer is formed by the metal thin film 30 with the same patterning process.

(62) For example, a layer of photoresist 8 is formed on the metal thin film, and for example, a positive photoresist may be used. As shown in FIG. 3b, exposure and development are conducted on the photoresist by using a dual-tone mask process. In a half-tone mask used in the dual-tone mask process, zones (a source region 1a and a drain region 2a) corresponding to regions where a source electrode and a drain electrode are to be formed are light-proof zones, and a zone (an active layer region 3a) corresponding to a region where an active layer is to be formed is partially transmissive zone, and other zone is fully transmissive zone. After the exposure and development process, the thickness of a photoresist 8a corresponding to the regions where the source electrode and the drain electrode are to be formed is larger than the thickness of a photoresist 8b corresponding to the region where the active layer is to be formed, and as shown in FIG. 3c, the photoresist in other region is fully removed.

(63) Afterwards, the metal thin film with a photoresist pattern formed thereon is etched, thereby forming a pattern 30a of the source electrode, the drain electrode and the active layer simultaneously.

(64) Step S3): a stop layer is formed to still cover a source region 1a and a drain region 2a, and to expose an active layer region 3a, as shown in FIG. 3d.

(65) For example, a photoresist layer with a smaller thickness is removed by an aching process, so as to expose the metal thin film in the active layer region 3a; the source region 1a and the drain region 2a are covered by the photoresist layer serving as the stop layer 7. As mentioned above, the material that is usable as the stop layer is not limited to photoresist.

(66) Step S4): part or all of the metal in the active layer region 3a is converted into a metal oxide semiconductor, and then the remaining photoresist is stripped off, namely, the stop layer on the source region 1a and the drain region 2a is removed, eventually forming the source electrode 1, the drain electrode 2 and the active layer 3, as shown in FIG. 1a. The source electrode 1 and drain electrode 2 are separated by the active layer 3 located between them.

(67) For example, conversion of part of all of metal in the active layer region into a metal oxide semiconductor may be conducted by means of heat treatment, so as to convert In into a metal oxide semiconductor In.sub.2O.sub.3, but it is not limited to heat treatment. Other method may also be adopted if the metal can be turned into a metal oxide semiconductor by the method.

(68) For example, the heat treatment is conducted under an oxygen atmosphere. Further, the heat treatment method may be as follows: the heat treatment may be carried out under an oxygen gas atmosphere, and the heat treatment may also be carried out under a nitrogen gas or inert gas atmosphere, which contains oxygen gas. For example, the heat treatment may be conducted under a nitrogen gas or argon gas atmosphere, which contains oxygen gas.

(69) For example, the temperature, time and other process parameters of the heat treatment may be determined according to the stop layer useful for covering the source region and the drain region. For example, the temperature of the heat treatment is lower than the thermal performance of the stop layer that covers the source region and the drain region, and the stop layer that covers the source region and the drain region can possess a better adhesion upon heat treatment, and can cover the source region and the drain region favorably, as long as the regions are not oxidized.

(70) According to another embodiment of the invention, there is further provided an array substrate, which includes the thin film transistor as stated in any of above-mentioned embodiments.

(71) The array substrate according to the embodiment of the invention includes a plurality of gate lines and a plurality of data lines, and these gate lines and data lines cross over each other to thereby define pixel units arranged in a matrix form, each of which includes a thin film transistor functioning as a switch element and a pixel electrode, and the thin film transistor is any thin film transistor obtained in above-mentioned embodiments. As shown in FIG. 4a and FIG. 4b, the array substrate includes a pixel electrode 10, a passivation layer 9, a protective layer 11 and so on. The pixel electrode 10, for example, may be made of a transparent conductive material, and for example, it may be made of any one of transparent conductive materials selected from the group consisting of indium tin oxide (ITO), indium zinc oxide, indium gallium zinc oxide, indium gallium tin oxide and so on. For example, regarding the thin film transistor of each of pixels, its gate electrode is electrically connected to or integrally formed with a corresponding gate line, its source electrode is electrically connected to or integrally formed with a corresponding data line, and its drain electrode is electrically connected to or integrally formed with a corresponding pixel electrode. For example, the passivation layer 9 and the protective layer 11 may be formed of a transparent material, and for example, silicon oxide, silicon nitride (SiNx), hafnium oxide, silicon oxynitride, aluminum oxide or the like may be used.

(72) According to another embodiment of the invention, there is further provided a display device, which includes the array substrate in any of the above-mentioned embodiments.

(73) An example of the display device is a liquid crystal display device, in which, an array substrate and a counter substrate are disposed opposite to each other to form a liquid crystal cell with a liquid crystal material filled therein. The counter substrate is such as a color filter substrate. The pixel electrode of each of pixel units of the array substrate acts to apply an electric field for control of the rotation degree of the liquid crystal material so as to perform a display operation. In some examples, the liquid crystal display device further includes a backlight source for providing the array substrate with backlight.

(74) Another example of the display device is an organic light emitting diode (OLED) device, in which, a stack of an organic light emitting material is formed on an array substrate, and a pixel electrode of each of pixel units serves as an anode or a cathode for driving the organic light emitting material to give off light so as to perform a display operation.

(75) Still another example of the display device is an electronic paper display device. For example, an electronic ink layer is formed on an array substrate, and a pixel electrode of each of pixel units, which serves as one of electrodes for producing an electric field, act to apply a voltage for driving charged microparticles in the electronic ink to move so as to perform a display operation.

(76) A channel area is defined by a gap between the source electrode and the drain electrode, and various embodiments of the invention have been described by taking a thin film transistor with a rectangular channel as an example. However, the shape of the channel is not limited thereto. Rather, a thin film transistor of other type may be used as well. For example, a thin film transistor with a U-shaped channel may also be used.

(77) A thin film transistor provided by any embodiment of the invention includes a source electrode, a drain electrode and an active layer; the source electrode, the drain electrode and the active layer are disposed in the same layer, the source electrode and the drain electrode are separately joined to the active layer through their respective side faces, the material of the source electrode and the drain electrode is metal, and the material of the active layer is a metal oxide semiconductor in correspondence with the material of the source electrode and the drain electrode. When the thin film transistor is fabricated, a metal thin film is formed, and by using the same one patterning process, a pattern of a source electrode, a drain electrode and an active layer is formed by the metal thin film simultaneously; a stop layer is formed to cover a source region and a drain region, and to expose an active layer region; part or all of the metal in the active layer region is converted into a metal oxide semiconductor, and the stop layer in the source region and the drain region is removed, eventually forming the source electrode, the drain electrode and the active layer. With the thin film transistor and manufacturing method thereof provided by embodiments of the invention, the number of film coating processes, the number of etching processes and the number of masking processes can be decreased. Consequently, procedures can be decreased, and the cost is reduced.

(78) In the manufacturing method according to embodiments of the invention, in the event that a half-tone or gray-tone mask manner is adopted to simultaneously form a pattern of a source electrode, a drain electrode and an active layer and to distinguish a source region and a drain region that are required to be covered and an active layer region that is required to be exposed, the number of masking processes can be further decreased, thereby decreasing the procedures and reducing the cost.

(79) As regards the array substrate and the corresponding display device provided by embodiments of the invention, owing to the fact that they include a thin film transistor provided by embodiments of the invention, the number of film coating processes, the number of etching processes and the number of masking processes upon manufacture can be decreased. Consequently, the procedures can be decreased, and the cost is reduced.

(80) Descriptions made above are merely specific embodiments of the present invention, but the protection scope of the invention is not limited thereto. Changes or replacements, as easily conceivable by those skilled in the art within the technical scope disclosed by the invention, shall be encompassed within the protection scope of the invention. Therefore, the protection scope of the invention shall be determined by the protection scope of attached claims.

(81) This patent application claims the benefit of priority from Chinese patent application No. 201510054532.8 filed on Feb. 2, 2015, the disclosure of which is incorporated herein in its entirety by reference as a part of the present application.