POWER SEMICONDUCTOR STRUCTURE

Abstract

A power semiconductor structure is provided. The power semiconductor structure comprises a metal oxide semiconductor layer disposed on the gallium-containing oxide substrate. A thermal inner trench surrounds the gallium-containing oxide semiconductor layer and is disposed on the gallium-containing oxide substrate. A metal substrate is thermally connected to the thermal inner trench, and at least one pair of a P-type and an N-type semiconductor material are respectively connected to two ends of the metal substrate. When an external current flows into the N-type semiconductor material and flows through the metal substrate to the P-type semiconductor material, the heat energy generated by the gallium-containing oxide semiconductor layer is absorbed by the metal substrate through the thermal inner trench, and then dissipated by opposite ends of the P-type and the N-type semiconductor material opposite to the metal substrate.

Claims

1. A power semiconductor structure, comprising: a gallium-containing oxide substrate; a gallium-containing oxide semiconductor layer, disposed on the gallium-containing oxide substrate; a thermal inner trench, surrounding the gallium-containing oxide semiconductor layer and disposed on the gallium-containing oxide substrate; a metal substrate, thermally connected to the thermal inner trench; and at least one pair of a P-type semiconductor material and an N-type semiconductor material respectively connected to two ends of the metal substrate, wherein when an external current flows into the N-type semiconductor material and flows through the metal substrate to the P-type semiconductor material, the heat energy generated by the gallium-containing oxide semiconductor layer is absorbed by the metal substrate through the thermal inner trench, and dissipated by opposite ends of the P-type semiconductor material and the N-type semiconductor material opposite to the metal substrate.

2. The power semiconductor structure of claim 1, wherein the gallium-containing oxide substrate is a gallium oxide (Ga.sub.2O.sub.3) substrate.

3. The power semiconductor structure of claim 2, wherein the gallium oxide (Ga.sub.2O.sub.3) substrate is a -gallium oxide (-Ga.sub.2O.sub.3) substrate.

4. The power semiconductor structure of claim 1, wherein the gallium-containing oxide semiconductor layer is a gallium oxide (Ga.sub.2O.sub.3) semiconductor layer.

5. The power semiconductor structure of claim 1, further comprising a thermal external trench thermally connected to the opposite ends of the P-type semiconductor material and the N-type semiconductor material relative to the metal substrate.

6. The power semiconductor structure of claim 5, wherein the thermal inner trench and the thermal external trench comprise a thermally conductive filler therein and the thermally conductive filler is selected from one of the groups consisting of diamond, aluminum nitride, and silicon dioxide, and a combination thereof.

7. The power semiconductor structure of claim 1, wherein the at least one pair of the P-type semiconductor material and the N-type semiconductor material has a plurality of pairs of the P-type semiconductor material and the N-type semiconductor material, respectively connected to two ends of the metal substrate and arranged to be disposed on at least one side of the thermal inner trench.

8. The power semiconductor structure of claim 1, wherein the at least one pair of the P-type semiconductor material and the N-type semiconductor material has a plurality of pairs of the P-type semiconductor material and the N-type semiconductor material, respectively connected to two ends of the metal substrate and surrounding the periphery of the thermal inner trench.

9. The power semiconductor structure of claim 5, further comprising a thermal ring surrounding the periphery of the thermal external trench and thermally connected to the thermal external trench.

10. A power semiconductor structure, comprising: a gallium oxide (Ga.sub.2O.sub.3) substrate; an active area, disposed on the gallium oxide substrate; a thermal inner trench, surrounding the active area and disposed on the gallium oxide substrate; a metal substrate, thermally connected to the thermal inner trench; and at least one pair of a P-type semiconductor material and an N-type semiconductor material respectively connected to two ends of the metal substrate, wherein when an external current flows into the N-type semiconductor material and flows through the metal substrate to the P-type semiconductor material, the heat energy generated by the active area is absorbed by the metal substrate through the thermal inner trench, and dissipated by opposite ends of the P-type semiconductor material and the N-type semiconductor material opposite to the metal substrate.

11. The power semiconductor structure of claim 10, wherein the gallium oxide substrate is a -gallium oxide (-Ga.sub.2O.sub.3) substrate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] FIG. 1 is a schematic diagram of a power semiconductor structure in an embodiment of the present invention;

[0019] FIG. 2 is a partially enlarged schematic diagram of an active cooling structure in an embodiment of the present invention; and

[0020] FIG. 3 is a schematic diagram of a power semiconductor structure in another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0021] In the following description, the present invention will be explained

[0022] with reference to various embodiments thereof. These embodiments of the present invention are not intended to limit the present invention to any specific environment, application or particular method for implementations described in these embodiments. Therefore, the description of these embodiments is for illustrative purposes only and is not intended to limit the present invention. It shall be appreciated that, in the following embodiments and the attached drawings, a part of elements not directly related to the present invention may be omitted from the illustration, and dimensional proportions among individual elements and the numbers of each element in the accompanying drawings are provided only for ease of understanding but not to limit the present invention.

[0023] The present invention discloses a power semiconductor structure designed to address the issue of poor thermal management in power devices operating at high power densities, thereby enhancing their reliability and lifespan. Please refer to FIG. 1, which illustrates a power semiconductor structure formed on a gallium-containing oxide substrate 10. Specifically, the gallium-containing oxide substrate 10 is an ultra-wide bandgap semiconductor material, such as gallium oxide (Ga.sub.2O.sub.3). Gallium oxide can exist in different crystal structures, including -Ga.sub.2O.sub.3, -Ga.sub.2O.sub.3, -Ga.sub.2O.sub.3, -Ga.sub.2O.sub.3, and -Ga.sub.2O.sub.3. Among these, -Ga.sub.2O.sub.3 is the most thermodynamically stable structure under normal temperature and pressure conditions and exhibits excellent chemical stability. Currently, most power devices developed in this technical field adopt -Ga.sub.2O.sub.3. In terms of material properties, -Ga.sub.2O.sub.3 is the only material that can be grown using the method of liquid-phase deposition, giving it a natural cost advantage, making it a strong competitor for next-generation power devices.

[0024] Next, an active area 11 of the power device is formed on the gallium-containing oxide substrate 10. This active area 11 includes a gallium-containing oxide semiconductor layer, which may be a gallium oxide (Ga.sub.2O.sub.3) semiconductor layer, with variations depending on the type of power device. The power device may be a Schottky diode, high-electron-mobility transistor (HEMT), metal-oxide-semiconductor field-effect transistor (MOSFET), static induction transistor (SIT), junction field-effect transistor (JFET), insulated-gate bipolar transistor (IGBT), or light-emitting diode (LED). During power device's operation, the active area 11 generates a significant amount of heat. However, due to the low thermal conductivity of gallium oxide, the present invention introduces a thermal inner trench 12, which surrounds the peripheral of the active area 11 and is formed on the gallium-containing oxide substrate 10. The thermal inner trench 12 is filled with a thermally conductive filler made of a high thermal conductivity material, which may be selected from a group consisting of diamond, aluminum nitride (AlN), silicon dioxide (SiO.sub.2) and a combination thereof.

[0025] Furthermore, the present invention incorporates an active cooling structure surrounding the thermal inner trench 12. In one embodiment, the active cooling structure utilizes the Peltier effect, comprising at least one metal substrate 13 and at least one pair of an N-type semiconductor material 14 and a P-type semiconductor material 15. As shown in FIG. 1, at least one metal substrate 13 is arranged to surround the thermal inner trench 12, and the metal substrate 13 is thermally connected to the thermal inner trench 12 for allowing it to rapidly absorb most of the heat conducted from the gallium-containing oxide semiconductor layer of the active area 11 to the thermal inner trench 12. Meanwhile, the N-type semiconductor material 14 and the P-type semiconductor material 15 are paired and connected to both ends of a metal substrate 13.

[0026] As shown in FIG. 1, multiple pairs of active cooling structures are arranged to surround the peripheral of the thermal inner trench 12. Each pair of the active cooling structures consists of one metal substrate 13 and one pair of an N-type semiconductor material 14 and a P-type semiconductor material 15, wherein the N-type semiconductor material 14 and the P-type semiconductor material 15 are connected to both ends of the metal substrate 13 adjacent to the thermal inner trench 12. Specifically, the multiple active cooling structures in FIG. 1 are disposed on both sides of the thermal inner trench 12. When the power device is in operation, the active area 11 generates a substantial amount of heat. At this moment, an external current can be conducted for causing the current to flow from the N-type semiconductor material 14 through the metal substrate 13 to the P-type semiconductor material 15. Based on the Peltier effect, heat is absorbed at the interface where the current flows from the N-type semiconductor material 14 to the P-type semiconductor material 15 for creating a cold junction. The heat generated in the gallium-containing oxide semiconductor layer of the active area 11 is first conducted to the thermal inner trench 12, then absorbed by the metal substrate 13, and subsequently transferred to the near end of either the N-type semiconductor material 14 or the P-type semiconductor material 15. Finally, the heat is dissipated at the far end of the N-type semiconductor material 14 and the P-type semiconductor material 15 relative to the metal substrate 13. It should be noted that the current between each pair of the active cooling structures is conducted through the metal substrate 13 connected to the far ends of the N-type semiconductor material 14 and the P-type semiconductor material 15 (as indicated by the arrows in FIG. 2, which represent the direction of current flow).

[0027] Please refer to FIG. 1 and FIG. 2, which further illustrate that the power semiconductor structure of the present invention includes a thermal external trench 16, surrounding the active cooling structures and formed on the gallium-containing oxide substrate 10. The thermal external trench 16 further absorbs the heat transferred by the active cooling structures. As shown in the figures, the thermal external trench 16 is thermally connected to the far ends of the N-type semiconductor material 14 and the P-type semiconductor material 15 to facilitate further heat dissipation. Similar to the thermal inner trench 12, the thermal external trench 16 is filled with a high thermal conductivity material, which may be selected from a group consisting of diamond, aluminum nitride (AlN), silicon dioxide (SiO.sub.2), and a combination thereof. Additionally, a metal substrate 13 is further disposed between the thermal external trench 16, the N-type semiconductor material 14 and the P-type semiconductor material 15. Apart from serving as an electrical connection between multiple active cooling structures (as indicated by the arrows in FIG. 2, which represent the current flow direction), the metal substrate 13 further improves thermal conduction efficiency.

[0028] Preferably, the present invention further includes a thermal ring 17, which surrounds the peripheral of the thermal external trench 16 and is thermally connected thereto. By providing a larger heat dissipation area, the thermal ring 17 enhances the rapid heat dissipation of the power device. In practical applications, the thermal ring 17 can be combined with conventional heat dissipation structures, such as cooling fins, to achieve an optimal cooling effect. Furthermore, the active cooling structures shown in FIG. 1 are merely an exemplary embodiment and should not be considered to limit this invention. In practice, the number and layout of the active cooling structures between the thermal inner and external trenches may be adjusted according to actual requirements. As shown in FIG. 3, multiple pairs of the N-type semiconductor material 14 and the P-type semiconductor material 15 are arranged around the thermal inner trench 12, allowing the heat generated in the active area 11 to be rapidly dissipated to the thermal external trench 16 and the thermal ring 17, ultimately releasing the heat externally.

[0029] The above embodiments are used only to illustrate the implementations of the present invention and to explain the technical features of the present invention, and are not used to limit the scope of the present invention. Any modifications or equivalent arrangements that can be easily accomplished by people skilled in the art are considered to fall within the scope of the present invention, and the scope of the present invention should be limited by the claims of the patent application.