A three-dimensional non-volatile memory structure including a substrate, a stacked structure, a charge storage pillar, a channel pillar, and a ferroelectric material pillar is provided. The stacked structure is disposed on the substrate and includes a plurality of conductive layers and a plurality of first dielectric layers, and the conductive layers and the first dielectric layers are alternately stacked. The charge storage pillar is disposed in the stacked structure. The channel pillar is disposed inside the charge storage pillar. The ferroelectric material pillar is disposed inside the channel pillar.

A display device includes a base layer on which a display area and a non-display area are defined, a circuit layer including a first power electrode and driving circuits, which are disposed in the non-display area, a first planarization layer in which a first opening through which the first power electrode is exposed is defined and which covers the driving circuits, a second power electrode disposed on the first planarization layer to contact the first power electrode that is exposed through the first opening and overlapping at least a portion of the driving circuits, and a second planarization layer disposed on the first planarization layer to cover a portion of the second power electrode and having a groove part in an area overlapping the first planarization layer and the second power electrode in a plan view.

The present disclosure provides a semiconductor structure. The semiconductor structure includes an N.sup.th metal layer in a memory region and a periphery region, the periphery region spanning a wider area than the memory region, a plurality of magnetic tunneling junctions (MTJs) over the N.sup.th metal layer, the plurality of MTJs having at least one of mixed pitches and mixed sizes, a top electrode via over each of the plurality of MTJs; and an (N+M).sup.th metal layer over the plurality of MTJs. A method for manufacturing the semiconductor structure is also disclosed.

A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.

A pixel array in a solid-state imaging device includes first and second signal lines provided for each column. A pixel belongs to a first or second group on a row-by-row basis and includes a photoelectric conversion film, a FD line for accumulating signal charge, and an amplifier transistor for providing a voltage according to the signal charge. The pixel in the first group further includes a selection transistor for proving output voltage of the amplifier transistor to the first signal line, and the pixel in the second group further includes a selection transistor for proving output voltage of the amplifier transistor to the second signal line. The first signal line is disposed between the FD line in the first group and the second signal line, and the second signal line is disposed between the FD line in the second group and the first signal line.

An image pickup apparatus includes a first pixel electrode connected to a pixel circuit, a second pixel electrode adjoining the first pixel electrode and connected to the pixel circuit, a photoelectric conversion film continuously covering the first and second pixel electrodes, and an opposite electrode facing the first and second pixel electrodes via the film. The film includes a recessed portion recessed toward a portion between the first and second pixel electrodes on a surface opposite to the first and second pixel electrodes. The depth of the recessed portion is greater than the first pixel electrode's thickness, and a distance from the first pixel electrode to the recessed portion is greater than a distance from the first pixel electrode to the second pixel electrode. The opposite electrode is provided continuously along the surface via the film, and the recessed portion surrounds a part of the opposite electrode.

The present disclosure discloses an imaging method. The imaging method comprises: providing an image sensor, the image sensor comprising a photosensitive pixel array and a filter arranged on the photosensitive unit array, the filter comprising a filter cell array, and each filter cell covering a plurality of photosensitive pixels to form a merged pixel; and reading outputs of the photosensitive pixel array, and adding the outputs of the photosensitive pixels of the same merged pixel to obtain a pixel value of the merged pixel, thereby producing a merged image. Images, having higher signal to noise ratio, brightness, and definition, and less noise, can be captured by using the imaging method in low light. The present disclosure also discloses an imaging device using the imaging method and an electronic device using the imaging device.

A monolithic sensor for detecting infrared and visible light according to an example includes a semiconductor substrate and a semiconductor layer coupled to the semiconductor substrate. The semiconductor layer includes a device surface opposite the semiconductor substrate. A visible light photodiode is formed at the device surface. An infrared photodiode is also formed at the device surface and in proximity to the visible light photodiode. A textured region is coupled to the infrared photodiode and positioned to interact with electromagnetic radiation.

A printed circuit board includes: a base substrate having a plurality of pad group areas arranged in a first direction on the base substrate, each of the pad group areas being divided into first, second, and third pad areas that are sequentially arranged in a second direction crossing the first direction; first and second row pads disposed within each of the pad group areas and arranged in a third direction crossing the first and second directions; first lines respectively connected to the first row pads; and lower dummy lines on a same layer as that of the first lines. Some of the first row pads are in the first pad area, rest of the first row pads and some of the second row pads are in the second pad area, and rest of the second row pads are in the third pad area.

To provide a solid-state imaging device and an electronic apparatus with further improved performance. A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other. A first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate to each other does not include a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate. Alternatively, the first coupling structure does not exist