A compound semiconductor device comprises a substrate, comprising a top surface, a bottom surface, a side surface connecting the top surface and the bottom surface; and a semiconductor stack formed on the top surface, wherein the side surface comprises a first deteriorated surface, a second deteriorated surface, a first crack surface between the first and second deteriorated surfaces, a second crack surface between the first deteriorated surface and the top surface, and a third crack surface between the second deteriorated surface and the bottom surface, wherein the first and second deteriorated surfaces are rougher than at least one of the first crack surface, the second crack surface and the third crack surface; and wherein the second crack surface is about perpendicular to the top surface, and the third crack surface is about perpendicular to the bottom surface.

A compound semiconductor device comprises a substrate, comprising a top surface, a bottom surface, a side surface connecting the top surface and the bottom surface; and a semiconductor stack formed on the top surface, wherein the side surface comprises a first deteriorated surface, a second deteriorated surface, a first crack surface between the first and second deteriorated surfaces, a second crack surface between the first deteriorated surface and the top surface, and a third crack surface between the second deteriorated surface and the bottom surface, wherein the first and second deteriorated surfaces are rougher than at least one of the first crack surface, the second crack surface and the third crack surface; and wherein the second crack surface is about perpendicular to the top surface, and the third crack surface is about perpendicular to the bottom surface.

A semiconductor device includes a semiconductor stack having a first-type semiconductor structure, an active structure, and a second-type semiconductor structure disposed on the first-type semiconductor structure. The second-type semiconductor structure has a doping concentration. A first portion includes a part of the first-type semiconductor structure, the active structure, and the second-type semiconductor structure, and has a current confining region. A second portion includes a part of the first-type semiconductor structure, the active structure, and the second-type semiconductor structure, and includes a first-type heavily doped region in the second-type semiconductor structure. The first-type heavily doped region includes a doping concentration higher than that of the second-type semiconductor structure.

An optoelectronic semiconductor device comprises a barrier layer, a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant, and a second semiconductor layer beneath the barrier layer, the second semiconductor comprising the second dopant, wherein, in the first semiconductor layer, a concentration of the first dopant is larger than a concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is larger than that in the first semiconductor layer.

A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thus improving crystal quality of the III-IV-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.

A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thus improving crystal quality of the III-IV-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.

A crystal substrate is composed of a crystal of a nitride of a group 13 element and has a first main face and a second main face. The crystal substrate includes a low carrier concentration region and a high carrier concentration region both extending between the first main face and second main face. The low carrier concentration region has a carrier concentration of 10.sup.18/cm.sup.3 or lower and a defect density of 10.sup.7/cm.sup.2 or lower. The high carrier concentration region has a carrier concentration of 10.sup.19/cm.sup.3 or higher and a defect density of 10.sup.8/cm.sup.2 or higher.

An LED fabrication method includes forming impurity release holes by focusing a laser at the substrate back surface, and forming invisible explosion points by focusing a laser inside the substrate on positions corresponding to the impurity release holes; communicating the impurity release holes with the invisible explosion points to release impurities generated during forming of the invisible explosion points from the substrate through the impurity release holes, thereby avoiding low external quantum efficiency resulting from adherence of impurities to the side wall of the invisible explosion points. By focusing on a position with 10 μm˜40 ˜m inward from the substrate back side, adjusting laser energy and frequency to burn holes inside the substrate to penetrate and expose the substrate back surface, thereby effectively removing by-products, and reducing light absorption by such by-products, light extraction from a side wall of the LED can also be improved and light extraction efficiency is enhanced.

A semiconductor structure includes a first-type semiconductor layer, a second-type semiconductor layer, a light emitting layer and a hole supply layer. The light emitting layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The hole supply layer is disposed between the light emitting layer and the second-type semiconductor layer, and the hole supply layer includes a first hole supply layer and a second hole supply layer. The first hole supply layer is disposed between the light emitting layer and the second hole supply layer, and a chemical formula of the first hole supply layer is Al.sub.x1In.sub.y1Ga.sub.1-x1-y1N, wherein 0≦x1<0.4, and 0≦y1<0.4. The second hole supply layer is disposed between the first hole supply layer and the second-type semiconductor layer, a chemical formula of the second hole supply layer is Al.sub.x2In.sub.y2Ga.sub.1-x2-y2N, wherein 0≦x2<0.4, 0≦y2<0.4, and x1>x2.

An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.