Provided herein is a method for forming a transparent electrode film for display and the transparent electrode film for display, the method comprising forming an electrode pattern by printing a fine electrode pattern on a release film using a conductive ink composition; forming an insulating layer by applying an insulating resin on the release film on which the electrode pattern has been formed; forming a substrate layer by laminating a substrate on the insulating layer; and removing the release film.

An electronic apparatus and a method for manufacturing the same are disclosed. The electronic device of the present invention comprises: a substrate with a first surface and a second surface; an electronic unit layer disposed on the first surface of the substrate; a residue layer disposed on the second surface of the substrate, wherein a material of the residue layer comprises: a compound containing at least one functional group selected from the group consisting of aryl, nitro and ketone.

A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

A method includes providing a layer of non-conductive material having a conductive electroplating seed layer formed on a surface thereof; applying a photoresist layer over the surface of the conductive electroplating seed layer; and defining wiring channels in the photoresist resist layer. The method includes electroplating a conductive material in the defined wiring channels; adhering a non-conductive layer over the photoresist layer and the plated conductive material in the wiring channels; and removing the layer of non-conductive material and the conductive electroplating seed layer.

A substrate with an electronic component embedded therein includes: a core structure having a cavity; a metal layer disposed on a bottom surface of the cavity of the core structure; and an electronic component disposed on the metal layer in the cavity of the core structure. The substrate with the electronic component embedded therein has an excellent heat dissipation effect.

In an embodiment, a smart connector includes an Application Specific Electronics Packaging (ASEP) device formed by an ASEP manufacturing process, and a separate printed circuit board electrically connected to electrical components of the ASEP device. The ASEP manufacturing process includes forming a continuous carrier web having a plurality of lead frames, overmolding a substrate onto the fingers of each lead frame, each substrate having a plurality of openings which exposes a portion of the fingers, electroplating the traces, and electrically attaching at least one electrical component to the traces to form a plurality of ASEP devices. In some embodiments, the printed circuit board has electrical components configured to control the functionality of the electrical components. In some embodiments, the printed circuit board has electrical components configured to modify properties of the smart connector.

A substrate structure including a carrier and a substrate is provided. The carrier includes a release layer, a dielectric layer and a metal layer. The dielectric layer is disposed between the release layer and the metal layer. The substrate includes a packaging region and a peripheral region. The peripheral region is connected to the packaging region and surrounds the packaging region. The peripheral region or the packaging region has a plurality of through holes. The substrate is disposed on the carrier. The release layer is located between the substrate and the dielectric layer. The release layer and the dielectric layer are filled in the through hole such that the substrate is separably attached to the carrier.

Provided is a double layer circuit board and a manufacturing method thereof. The double layer circuit board comprises a substrate, a first circuit layer formed on a first surface of the substrate, a second circuit layer formed on a second surface of the substrate, and at least one connecting pillar formed in and covered by the substrate. Each one of the at least one connecting pillar includes a first end connected to the first circuit layer and a second end connected to the second circuit layer. A terminal area of the second end is greater than a terminal area of the first end. Therefore, the second circuit layer is firmly connected to the first circuit layer through the at least one connecting pillar. A yield rate of the double layer circuit board may be increased.