A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.

A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.

A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.

A multilayer ceramic capacitor includes a laminate and

an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 .Math.m or less.

A multilayer ceramic capacitor includes a laminate and

an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 .Math.m or less.

A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

A metalized film includes a dielectric film having a first surface and a second surface opposite to the first surface. The dielectric film has a film thickness of 1 to 3 μm. The first surface has an arithmetic mean height. The second surface has an arithmetic mean height. The arithmetic mean heights are different. The first surface has a maximum height Sz1 satisfying the expression 100 nm<Sz1≤350 nm. The second surface has a maximum height Sz2 satisfying the expression 10 nm≤Sz2≤100 nm. The metalized film includes a metal film on the second surface.

The insulating member is integrated with only one of the busbars by insert molding in which one of opposing plate members in either one of the busbars is used as an insert target. The insulating member includes an insulation active portion, a reinforcing portion and a connecting portion. The insulation active portion is disposed on a back-surface side of one of the opposing plate portions and is interposed between the back-surface side and the other one of the opposing plate portions. The reinforcing portion is disposed on the front-surface side of the one of the opposing plate portions.

The connecting portion serves to connect the insulation active portion and the reinforcing portion into an integral unit. In the insulating member, lower end regions of the insulation active portion, reinforcing portion and connecting portion, which are close to the capacitor element and extending from an upper-surface side to a lower-surface side of a side plate portion, are embedded in a mold resin that covers the side plate portion.

A structural body that includes: a substrate; a plurality of fibrous materials, each of the plurality of fibrous material including a fibrous core material and a covering layer that covers the fibrous core material such that an exposed portion of the fibrous core material is formed at an end portion thereof; and an adhesive layer that bonds the substrate and the end portion of each of the plurality of fibrous materials to each other such that a boundary between the covering layer and the exposed portion is located inside the adhesive layer.

A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.