An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

Provided are capacitors of semiconductor devices, wherein the capacitors may be used in a high-frequency operation environment. A capacitor includes a first electrode layer, a dielectric layer on the first electrode layer, and a second electrode layer on the dielectric layer, wherein the dielectric layer includes a plurality of unit dielectric layers, and the unit dielectric layer includes first and second sub-dielectric layers that have different dielectric constants and conductivities from each other and are connected in series, and the first and second sub-dielectric layers have a conductivity difference so that the capacitance of the dielectric layer converges to the capacitance of the unit dielectric layer.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active metallization that is electrically connected to the active electrode plates and a ground metallization that is electrically connected to the ground electrode plates of the capacitor. A ground electrical path extends from the ground metallization of the chip capacitor to the ferrule. A conductive ground pin is electrically and mechanically connected to the ferrule. The ground path comprises an internal ground plate disposed within the circuit board substrate. The internal ground plate is electrically connected to the ground metallization of the chip capacitor and to either the ferrule or the ground pin connected to the ferrule. An active electrical path extends between the active metallization of the chip capacitor and the lead wire.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active metallization that is electrically connected to the active electrode plates and a ground metallization that is electrically connected to the ground electrode plates of the capacitor. A ground electrical path extends from the ground metallization of the chip capacitor to the ferrule. A conductive ground pin is electrically and mechanically connected to the ferrule. The ground path comprises an internal ground plate disposed within the circuit board substrate. The internal ground plate is electrically connected to the ground metallization of the chip capacitor and to either the ferrule or the ground pin connected to the ferrule. An active electrical path extends between the active metallization of the chip capacitor and the lead wire.

A sensor for determining plural parameters includes a housing that defines a chamber and a parallel plate capacitor having a first plate located inside the chamber and a second plate fixedly attached to a first external side of the housing. A dielectric multi-layer placed between the first and second plates includes a pressure sensitive layer and a humidity sensitive layer.

A multicomponent dielectric film includes overlapping dielectric layers and outer layers that have a higher surface energy compared to the overlapping dielectric layers, the overlapping dielectric layers including at least a first polymer material, a second polymer material, and optionally a third polymer material, adjoining dielectric layers defining a generally planar interface therebetween which lies generally in an x-y plane of an x-y-z coordinate system, the interfaces between the layers delocalizing the charge build up in the layers.

A capacitor that prevents generation of a substrate capacitance composed of an upper electrode, a substrate, and a lower electrode. Specifically, the capacitor includes a substrate; a lower electrode disposed on the substrate; a dielectric film disposed on the lower electrode; an upper electrode disposed on a part of the dielectric film; and a first terminal electrode that is connected to the upper electrode. Moreover, the upper electrode and the first terminal electrode are formed in a region for forming the lower electrode in a plan view of the capacitor viewed from the first terminal electrode side.

The present disclosure provides a chip capacitor, including: a first capacitor unit formed over a substrate and including a first lower electrode, first dielectric layer and first upper electrode; a second insulating layer over the first capacitor unit; a second conductive layer over the second insulating layer, and includes a first wiring portion and a second wiring portion, the first wiring portion being connected to the first lower electrode by a first contact via and connected to a first pad by a third contact via, the second wiring portion being connected to the first upper electrode by a second contact via and connected to a second pad by a fourth contact via; a first external electrode connected to the first wiring portion; and a second external electrode connected to the second wiring portion.

The present disclosure provides a chip capacitor, including: a first capacitor unit formed over a substrate and including a first lower electrode, first dielectric layer and first upper electrode; a second insulating layer over the first capacitor unit; a second conductive layer over the second insulating layer, and includes a first wiring portion and a second wiring portion, the first wiring portion being connected to the first lower electrode by a first contact via and connected to a first pad by a third contact via, the second wiring portion being connected to the first upper electrode by a second contact via and connected to a second pad by a fourth contact via; a first external electrode connected to the first wiring portion; and a second external electrode connected to the second wiring portion.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization that is electrically connected to the active electrode plates and a ground end metallization that is electrically connected to the at least one ground electrode plates of the chip capacitor. There is a ground path electrically extending between the ground end metallization of the chip capacitor and the ferrule. The ground path comprises at least a first electrical connection material connected directly to the first gold braze, and at least an internal ground plate disposed within the circuit board substrate with the internal ground plate being electrically connected to both the first electrical connection material and the ground end metallization of the chip capacitor. An active path electrically extends between the active end metallization of the chip capacitor and the lead wire.