Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

The present invention provides a resin composition which has excellent decomposability at low temperature, can provide a molded article having high strength, and enables an increase in the number of layers and thinning so as to enable production of an all-solid-state battery and a ceramic laminate (e.g., a multilayer ceramic capacitor) having excellent properties. The present invention also relates to an inorganic fine particle-dispersed slurry composition containing the resin composition, an inorganic fine particle-dispersed sheet, a method for producing an all-solid-state battery, and a method for producing a multilayer ceramic capacitor. The present invention relates to a resin composition containing a (meth)acrylic resin, the (meth)acrylic resin containing 20 to 70% by weight in total of a segment derived from methyl methacrylate and a segment derived from isobutyl methacrylate, 1 to 10% by weight of a segment derived from a glycidyl group-containing (meth)acrylate, and 5 to 40% by weight of a segment derived from a (meth)acrylate containing an ester substituent having a carbon number of 8 or more.

The present invention provides a resin composition which has excellent decomposability at low temperature, can provide a molded article having high strength, and enables an increase in the number of layers and thinning so as to enable production of an all-solid-state battery and a ceramic laminate (e.g., a multilayer ceramic capacitor) having excellent properties. The present invention also relates to an inorganic fine particle-dispersed slurry composition containing the resin composition, an inorganic fine particle-dispersed sheet, a method for producing an all-solid-state battery, and a method for producing a multilayer ceramic capacitor. The present invention relates to a resin composition containing a (meth)acrylic resin, the (meth)acrylic resin containing 20 to 70% by weight in total of a segment derived from methyl methacrylate and a segment derived from isobutyl methacrylate, 1 to 10% by weight of a segment derived from a glycidyl group-containing (meth)acrylate, and 5 to 40% by weight of a segment derived from a (meth)acrylate containing an ester substituent having a carbon number of 8 or more.

In a capacitor unit including a pair or a plurality of pairs of capacitors having a dielectric, a first electrode formed on the dielectric, and a second electrode formed on the dielectric, wherein voltages in reverse directions are applied between the first electrodes and the second electrodes of respective two capacitors forming a pair.

In a capacitor unit including a pair or a plurality of pairs of capacitors having a dielectric, a first electrode formed on the dielectric, and a second electrode formed on the dielectric, wherein voltages in reverse directions are applied between the first electrodes and the second electrodes of respective two capacitors forming a pair.

A multilayer capacitor includes: a capacitor body including dielectric layers and first and second internal electrodes, and having first to six external surfaces, wherein the first internal electrode is exposed through the third, fifth, and sixth external surfaces, and the second internal electrode is exposed through the fourth, fifth, and sixth external surfaces; first and second side portions; and first and second external electrodes including first and second sintered electrodes, and first and second conductive resin electrodes, respectively, wherein L/T<3.5% is satisfied, where L is a thickness of the first or second side portion, taken at a level at which the first or second internal electrode is disposed, L is a difference between a maximum L value and a minimum L value, and T is a length of the first or second side portion in a direction perpendicular to the first and second internal electrodes.

A wire capacitor includes a wire structure extending in a longitudinal direction and a conductive layer covering an outer surface of the wire structure. The wire structure includes a core electrode line having a wire shape and extending in the longitudinal direction and a dielectric line surrounding an outer surface of the core electrode line and extending in the longitudinal direction. The wire structure has a first end and a second end which are opposite to each other in the longitudinal direction, and the conductive layer exposes an outer circumference of the first end and the second end of the wire structure.

A wire capacitor includes a wire structure extending in a longitudinal direction and a conductive layer covering an outer surface of the wire structure. The wire structure includes a core electrode line having a wire shape and extending in the longitudinal direction and a dielectric line surrounding an outer surface of the core electrode line and extending in the longitudinal direction. The wire structure has a first end and a second end which are opposite to each other in the longitudinal direction, and the conductive layer exposes an outer circumference of the first end and the second end of the wire structure.

The present disclosure provides a chip capacitor, including: a first capacitor unit formed over a substrate and including a first lower electrode, first dielectric layer and first upper electrode; a second insulating layer over the first capacitor unit; a second conductive layer over the second insulating layer, and includes a first wiring portion and a second wiring portion, the first wiring portion being connected to the first lower electrode by a first contact via and connected to a first pad by a third contact via, the second wiring portion being connected to the first upper electrode by a second contact via and connected to a second pad by a fourth contact via; a first external electrode connected to the first wiring portion; and a second external electrode connected to the second wiring portion.

The present disclosure provides a chip capacitor, including: a first capacitor unit formed over a substrate and including a first lower electrode, first dielectric layer and first upper electrode; a second insulating layer over the first capacitor unit; a second conductive layer over the second insulating layer, and includes a first wiring portion and a second wiring portion, the first wiring portion being connected to the first lower electrode by a first contact via and connected to a first pad by a third contact via, the second wiring portion being connected to the first upper electrode by a second contact via and connected to a second pad by a fourth contact via; a first external electrode connected to the first wiring portion; and a second external electrode connected to the second wiring portion.