A multi-material electrode device is disclosed. The multi-material electrode device includes a first electrode, a dielectric material coupled to the first electrode, and a second electrode coupled to the dielectric material. In the multi-material electrode device, the first electrode and the second electrode do not include the same material.

A multi-material electrode device is disclosed. The multi-material electrode device includes a first electrode, a dielectric material coupled to the first electrode, and a second electrode coupled to the dielectric material. In the multi-material electrode device, the first electrode and the second electrode do not include the same material.

A method for preparing a modified polypropylene film, the modified polypropylene film comprising a polypropylene film; and, an oxide layer and/or nitride layer, each of which has a thickness of 20-500 nm, on a surface of the polypropylene film; the method comprising: depositing the oxide layer or nitride layer on a surface of the polypropylene film by an Atomic Layer Deposition (ALD) process to obtain the modified polypropylene film; wherein the step of depositing the oxide layer or nitride layer comprises: placing the polypropylene film in an ALD reaction chamber; vacuumizing; heating up; introducing a carrier gas; and, passing at least two precursors into the reaction chamber alternately for reaction, resulting in the modified polypropylene film; wherein the precursors comprise a precursor for providing a metal element or Si, and a precursor for providing an oxygen or nitrogen element.

A power capacitor includes a body that defines an interior space; and at least one capacitive device in the interior space. The capacitive device includes a first electrode; and a second electrode separated from the second electrode. The power capacitor also includes a dielectric nanofluid in the interior space and between the first electrode and the second electrode, the dielectric nanofluid including: a base dielectric fluid; and nanoparticles dispersed in the base dielectric fluid.

A power capacitor includes a body that defines an interior space; and at least one capacitive device in the interior space. The capacitive device includes a first electrode; and a second electrode separated from the second electrode. The power capacitor also includes a dielectric nanofluid in the interior space and between the first electrode and the second electrode, the dielectric nanofluid including: a base dielectric fluid; and nanoparticles dispersed in the base dielectric fluid.

A MIM structure and manufacturing method thereof are provided. The MIM structure includes a substrate and a metallization structure over the substrate. The metallization structure includes a bottom electrode layer, a dielectric layer on the bottom electrode layer, a ferroelectric layer on the dielectric layer, a top electrode layer on the ferroelectric layer, a first contact electrically coupled to the top electrode layer, and a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to a base portion of the bottom electrode layer. The bottom electrode layer includes the base portion and a plurality of protrusions, each of the protrusions is protruding from the base portion and leveled with a lower surface of the dielectric layer, each portion of the dielectric layer over the bottom electrode layer substantially have identical thicknesses.

A MIM structure and manufacturing method thereof are provided. The MIM structure includes a substrate and a metallization structure over the substrate. The metallization structure includes a bottom electrode layer, a dielectric layer on the bottom electrode layer, a ferroelectric layer on the dielectric layer, a top electrode layer on the ferroelectric layer, a first contact electrically coupled to the top electrode layer, and a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to a base portion of the bottom electrode layer. The bottom electrode layer includes the base portion and a plurality of protrusions, each of the protrusions is protruding from the base portion and leveled with a lower surface of the dielectric layer, each portion of the dielectric layer over the bottom electrode layer substantially have identical thicknesses.

A semiconductor device includes a semiconductor substrate having first and second main surfaces that oppose each other in a thickness direction, and a circuit layer disposed on the first main surface. The circuit layer includes a first electrode layer on a side of the semiconductor substrate, a second electrode layer that faces the first electrode layer, a dielectric layer disposed between the electrode layers, and a first outer electrode electrically connected to the first electrode layer through an opening in the dielectric layer. An end portion of the dielectric layer on a side of the first region is in contact with the first electrode layer, and in the dielectric layer, a size of the end portion in the thickness direction is smaller than a size of an inter-electrode portion between the first and second electrode layers in the thickness direction.

A capacitor can include a dielectric layer including a polymer matrix and ceramic particles dispersed with the polymer matrix. The polymer matrix can include epoxy. The ceramic powders can include composition modified barium titanate ceramic powders. In an embodiment, the capacitor can include a plurality of layers. In another embodiment, the dielectric layer can have a thickness of 0.1 microns to 100 microns.

A dielectric thin film includes a stack structure of a perovskite material layer including at least two Group II elements and a rocksalt layer on the perovskite material layer and including at least two Group II elements. A first content ratio of the at least two Group II elements included in the perovskite material layer may be the same as a second content ratio of the at least two Group II elements included in the rocksalt layer.