To provide a thin film capacitor having high adhesion performance with respect to a circuit substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The first and second electrode layers are formed in an area surrounded by an outer peripheral area of the upper surface of the metal foil so as not to cover the outer peripheral area. The outer peripheral area of the roughened upper surface of the metal foil is thus exposed, so that adhesion performance with respect to a circuit substrate can be enhanced.

To provide a thin film capacitor in which a pair of terminal electrodes can be disposed on the same plane. A thin film capacitor includes a metal foil having a roughened upper surface, a dielectric film covering the upper surface of the metal foil and having an opening for partly exposing the metal foil therethrough, a first electrode layer contacting the metal foil through the opening, and a second electrode layer contacting the dielectric film without contacting the metal foil. With this configuration, both the first and second electrode layers can be disposed on the upper surface of the metal foil. In addition, since the metal foil is surface-roughened, a larger capacitance can be obtained.

To provide a thin film capacitor having high flexibility. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The particle diameter of crystal at a non-roughened center part of the metal foil is less than 15 μm in the planar direction and less than 5 μm in the thickness direction. This can not only enhance the flexibility of the metal foil to reduce a short-circuit failure in a state where the thin film capacitor is incorporated in a multilayer substrate but also enhance positional accuracy.

An electronic component includes an electronic component main body having a mounting surface with first and second baked electrodes located thereon at locations spaced apart from one another. A recess extends into the electronic component main body in the area between the first and second baked electrodes. The recess extends over at least a part of at least one of the first and second baked electrodes.

An electronic component includes an electronic component main body having a mounting surface with first and second baked electrodes located thereon at locations spaced apart from one another. A recess extends into the electronic component main body in the area between the first and second baked electrodes. The recess extends over at least a part of at least one of the first and second baked electrodes.

In an embodiment a component includes at least one carrier layer, the carrier layer having a top side and a bottom side and at least one functional layer arranged on the top side of the carrier layer, the functional layer including a material having a specific electrical characteristic, wherein the component is configured for direct integration into an electrical system as a discrete component.

A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween and disposed in point-symmetry with each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, and the first and second internal electrodes include a region in which an electrode is not disposed.

A multi-terminal capacitor is provided that can be used either as a feedthrough capacitor or as a LW reversal capacitor. A multi-terminal capacitor includes a capacitor body shaped like a rectangular parallelepiped. The capacitor body includes a capacitance forming portion configured to form capacitance between a first conductor film and a second conductor film facing each other with a dielectric film being interposed therebetween. On one of the surfaces of the capacitor body in the third direction, first and second external terminals electrically connected to the first conductor film, and a third external terminal electrically connected to the second conductor film are provided. On the other of the surfaces of the capacitor body in the third direction, fourth and fifth external terminals electrically connected to the first conductor film and a sixth external terminal electrically connected to the second conductor film are provided.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.