A method of manufacturing an electronic device formed in a cavity may include, on a first substrate having a bottom surface and a top surface, forming a first side wall of a certain height along a periphery on the bottom surface to surround an electronic circuit disposed on the bottom surface; forming a via communicating between the bottom surface and the top surface, forming of the via including stacking a first stop layer and a second stop layer sequentially on a portion of the bottom surface of the first substrate corresponding to the via and etching the first substrate to form a through-hole corresponding to the via, a rate of etching the first substrate being greater than that of the first stop layer and a rate of etching the first stop layer being greater than that of the second stop layer; forming a second side wall of a certain height along a periphery on a top surface of the second substrate; and aligning and bonding the first side wall and the second side wall.

The present disclosure relates to micro-LED chips, methods for manufacturing the same, and display devices. The micro-LED chip includes: a driving backplane including at least one first electrode, a groove being provided above the first electrode, and the first electrode being located at a bottom of the groove; the groove being filled with a conductive material, and the conductive material being obtained by curing a corresponding conductive ink; and a light emitting chip including at least one second electrode; and the first electrode is connected to the second electrode through the conductive material.

This disclosure pertains to hardware compute arrays (sometimes called systolic arrays) for applications such as artificial intelligence (AI), machine learning (ML), digital signal processing (DSP), graphics processing units (GPUs), and other computationally intensive applications. More particularly, it pertains to novel and advantageous architecture innovations for efficiently and inexpensively implementing such arrays using multiple integrated circuits. Hardware and methods are disclosed to allow compute arrays to be tested after face-to-face or wafer-to-wafer bonding and without out any pre-bonding test. Defects discovered in the post-bonding testing can be completely or partially healed increasing yields and reducing costs.

Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

The device and method according to the invention are used to transfer an electronic ferromagnetic component from a carrier to a substrate using a magnetic assembly. The magnetic assembly is designed and arranged to aid in the correct positioning of the at least partly ferromagnetic electronic component on the substrate. The magnetic field generated by the magnetic assembly produces a magnetic force oriented from the carrier towards the substrate, said magnetic force aiding the transfer of the component from the carrier to the substrate such that a significantly increased positioning accuracy of the component is achieved compared to a transfer without said magnetic force.

An electronic device includes a first substrate and a second substrate. A side wall joins the first substrate to the second substrate. The side wall includes a first alloy layer of a first metal and a second metal bonded directly to an upper surface of the first substrate and a second alloy layer of the first metal and a third metal disposed on top of the first alloy layer and bonded directly to a lower surface of the second substrate, the second metal and the third metal being different from each other and from the first metal. An electronic circuit is disposed on the lower surface of the second substrate within a cavity defined by the lower surface of the first substrate, the upper surface of the second substrate, and the side wall.

Methods of manufacturing an electronic device formed in a cavity may include providing a first substrate having a first side wall including a first metal formed along a periphery on a bottom surface thereof and surrounding an electronic circuit disposed on the bottom surface, providing a second substrate having a second side wall including a second metal and a third metal formed along a periphery on a top surface thereof, aligning the first substrate with the second substrate with the first side wall opposing and contacting the second side wall to internally define a cavity between the bottom surface of the first substrate, the top surface of the second substrate, the first side wall ,and the second side wall, and heating and bonding the first substrate and the second substrate by transient liquid phase bonding.

A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix. The magnetic polymer can be part of an insulation layer in an inductor formed in one or more backend wiring layers of an integrated device. The magnetic polymer can also be in the form of a magnetic epoxy layer for mounting contacts of the integrated device to a package substrate.

A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.