The disclosure relates to a radio frequency oscillator. The radio frequency oscillator includes a resonator circuit being resonant at an excitation of the resonator circuit in a differential mode and at an excitation of the resonator circuit in a common mode. The resonator circuit has a differential mode resonance frequency at the excitation in the differential mode, and the resonator circuit has a common mode resonance frequency at the excitation in the common mode. A first excitation circuit is configured to excite the resonator circuit in the differential mode to obtain a differential mode oscillator signal oscillating at the differential mode resonance frequency, and a second excitation circuit is configured to excite the resonator circuit in the common mode to obtain a common mode oscillator signal oscillating at the common mode resonance frequency.

An amplifier circuit includes a first port, a second port, a reference potential port, and an RF amplifier device having a first terminal electrically coupled to the first port, a second terminal electrically coupled to the second port, and a reference potential terminal electrically coupled to the reference potential port. The RF amplifier device amplifies an RF signal across an RF frequency range that includes a fundamental RF frequency. An impedance matching network is electrically coupled to the first terminal and the first port. The impedance matching network includes a baseband termination circuit that presents low impedance in a baseband frequency region, a fundamental frequency matching circuit that presents a complex conjugate of an intrinsic impedance of the RF amplifier device in the RF frequency range, and a second order harmonic termination circuit that presents low impedance at second order harmonics of frequencies in the fundamental RF frequency range.

An amplifier circuit includes a first port, a second port, a reference potential port, and an RF amplifier device having a first terminal electrically coupled to the first port, a second terminal electrically coupled to the second port, and a reference potential terminal electrically coupled to the reference potential port. The RF amplifier device amplifies an RF signal across an RF frequency range that includes a fundamental RF frequency. An impedance matching network is electrically coupled to the first terminal and the first port. The impedance matching network includes a baseband termination circuit that presents low impedance in a baseband frequency region, a fundamental frequency matching circuit that presents a complex conjugate of an intrinsic impedance of the RF amplifier device in the RF frequency range, and a second order harmonic termination circuit that presents low impedance at second order harmonics of frequencies in the fundamental RF frequency range.

Examples disclosed herein relate to a vector modulator architecture, having an input splitter network configured to receive a radio frequency (RF) input signal and generate a plurality of quadrature signals at different phases, a variable gain amplifier (VGA) stage coupled to the input splitter network and configured to apply a first gain to one or more of the plurality of quadrature signals, a power combiner coupled to the VGA stage and configured to combine the plurality of quadrature signals into a combined RF signal, and a power amplifier (PA) stage coupled to the power combiner and configured to apply a second gain to the combined RF signal and generate an output RF signal. Other examples disclosed herein relate to an antenna system for autonomous vehicles and a radar system for use in an autonomous driving vehicle.

Examples disclosed herein relate to a vector modulator architecture, having an input splitter network configured to receive a radio frequency (RF) input signal and generate a plurality of quadrature signals at different phases, a variable gain amplifier (VGA) stage coupled to the input splitter network and configured to apply a first gain to one or more of the plurality of quadrature signals, a power combiner coupled to the VGA stage and configured to combine the plurality of quadrature signals into a combined RF signal, and a power amplifier (PA) stage coupled to the power combiner and configured to apply a second gain to the combined RF signal and generate an output RF signal. Other examples disclosed herein relate to an antenna system for autonomous vehicles and a radar system for use in an autonomous driving vehicle.

An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.

An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.

A cascode amplifier circuit comprising a power amplifier block having a first transistor and a second transistor. The amplifier circuit also comprises: a bias generator block coupled to the first transistor and being configured to provide a reference voltage to the power amplifier block; and a current control block coupled to the second transistor of the power amplifier block, the current control block being configured to adjust a gate bias to the second transistor of the power amplifier block to maintain a constant quiescent current.

A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.

A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.