Patent classifications
H01L21/26
Semiconductor device and method of manufacturing thereof
A semiconductor device includes an n.sup.-type drift layer of an formed on an n.sup.+-type SiC substrate; a p-type layer provided on a surface opposite that facing the n.sup.+-type SiC substrate; and an n-type buffer layer provided, as a recombination promoting layer, between the n.sup.-type drift layer and the n.sup.+-type SiC substrate, the n-type buffer layer having an impurity concentration higher than that of the n.sup.-type drift layer. In the buffer layer, as a recombination site, a defect energy-level is introduced at a high concentration of 110.sup.12/cm.sup.3 or higher. The buffer layer promotes internal electron-hole recombination and without applying high energy to BPDs at an interface of the buffer layer and the SiC substrate, may reduce the amount of recombination near the interface even at a current density equivalent to that of a conventional structure and thereby, prevents characteristics degradation at the time of operation.
Method for manufacturing gallium nitride substrate using the multi ion implantation
Disclosed is a method of fabricating a gallium nitride substrate using a plurality of ion implantation processes. A method of fabricating a gallium nitride substrate using a plurality of ion implantation processes according to an embodiment of the present disclosure includes a step of forming a bonding oxide film on the first gallium nitride; a step of performing first ion implantation for a surface of the first gallium nitride, on which the bonding oxide film is formed, at least once to form a damaged layer, thereby releasing bowing of the first gallium nitride; a step of performing second ion implantation for the surface of the first gallium nitride, on which the bonding oxide film is formed, to form a blister layer; a step of bonding the bonding oxide film of the first gallium nitride to a temporary substrate; a step of separating the first gallium nitride using the blister layer to form a seed layer; and a step of allowing growth of the second gallium nitride using the seed layer to form bulk gallium nitride.
Target location in semiconductor manufacturing
A method of overlay control in silicon wafer manufacturing comprises firstly locating a target comprising a diffraction grating on a wafer layer; and then measuring the alignment of patterns in successive layers of the wafer. The location of the target may be done by the pupil camera rather than a vision camera by scanning the target to obtain pupil images at different locations along a first axis. The pupil images may comprise a first order diffraction pattern for each location. A measurement of signal intensity in the first order diffraction pattern is then obtained for each location. The variation of signal intensity with location along each axis is then analyzed to calculate the location of a feature in the target.
METHOD FOR REDUCING DEFECTS OF ELECTRONIC COMPONENTS BY A SUPERCRITICAL FLUID
A method for reducing defects of an electronic component using a supercritical fluid includes recrystallizing and rearranging grains in the electronic component by introducing the supercritical fluid doped with H.sub.2S together with an electromagnetic wave into a cavity. The cavity has a temperature above a critical temperature of the supercritical fluid and a pressure above a critical pressure of the supercritical fluid.
METHOD FOR REDUCING DEFECTS OF ELECTRONIC COMPONENTS BY A SUPERCRITICAL FLUID
A method for reducing defects of an electronic component using a supercritical fluid includes recrystallizing and rearranging grains in the electronic component by introducing the supercritical fluid doped with H.sub.2S together with an electromagnetic wave into a cavity. The cavity has a temperature above a critical temperature of the supercritical fluid and a pressure above a critical pressure of the supercritical fluid.
Laser processing apparatus
A laser processing apparatus includes: a stage 2 capable of levitating and transporting a substrate 3 by jetting gas from a front surface; a laser oscillator configured to irradiate a laser beam 20a onto the substrate 3; and a gas jetting port arranged at a position overlapping a focus point position of the laser beam 20a in plan view, and being configured to jet inert gas. The front surface of the stage 2 is constituted by upper structures 5a and 5b, and the upper structures 5a and 5b are arranged so as to be spaced apart from each other and face each other. A gap between the upper structures 5a and 5b overlaps the focus point position of the laser beam 20a in plan view. A filling member 8 is arranged between the upper structures 5a and 5b so as to fill the gap between the upper structures 5a and 5b.
Wafer processing method
A wafer processing method for processing a wafer has a front side and a back side, the front side of the wafer being formed with a plurality of crossing streets for defining a plurality of separate regions where a plurality of devices are individually formed. The wafer processing method includes the steps of first attaching a protective tape to the front side of the wafer, next heating the protective tape and the wafer, next applying a laser beam having a transmission wavelength to the wafer to the back side of the wafer along the streets, thereby forming a modified layer inside the wafer along each street, and next grinding the back side of the wafer, thereby reducing a thickness of the wafer to a predetermined thickness and also dividing the wafer into individual chips along each street where the modified layer is formed as a division start point.
Integrated circuit authentication from a die material measurement
The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC, and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.
Substrate processing device, substrate processing method, and ultraviolet irradiator selecting method
A substrate processing device includes substrate holder, a plurality of ultraviolet irradiators, and controller. The substrate holder holds a substrate. The ultraviolet irradiators irradiate gaps between a plurality of fine structures formed on the substrate held by the substrate holder with ultraviolet rays in spectra different from each other. The controller controls the plurality of ultraviolet irradiators.
Surface treatment method of a polymer for 5G
The present application discloses a surface treatment method of a polymer for 5G, belonging to the technical field of surface treatment of polymer. By injecting and adding the oxygen elements to the polymer, the polymer matrix elements and the injected atoms can form a blend structure, which can increase the surface roughness of the polymer, improve its bonding strength with the metal, and thus enhance its anti-peel strength. The surface treatment method of the application has the surface resistivity, surface roughness, water absorption and tensile properties of the polymer all considered. The equipment used in the invention has long service life and low cost, and can realize large-scale roll-to-roll production. The method can be popularized in polymer surface treatment.