An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes a substrate and a thin film transistor layer arranged on the substrate. The thin film transistor layer includes a plurality of thin film transistors. The thin film transistors each include an active layer, a source/drain, a first gate, a second gate, and a first insulating layer. The first gate and the second gate are electrically connected through the through hole. The problems of difficulty in etching and excessively long etching time are avoided while reducing the gate resistance of the thin film transistor.

An array substrate and a manufacturing method thereof are provided. A patterned metal member of the array substrate includes a patterned first metal layer, a patterned second metal layer, and a patterned copper layer which are sequentially disposed on a substrate. An etching rate at which an etching solution etches the second metal layer is less than another etching rate at which the etching solution etches the first metal layer. An adhesion force between the patterned first metal layer and the substrate is greater than another adhesion force between the patterned copper layer and the substrate.

A light emitting display device includes: a light emitting element; a second transistor connected to a scan line; a first transistor which applies a current to the light emitting element; a capacitor connected to a gate electrode of the first transistor; and a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor. Channels of the second transistor, the first transistor, and the third transistor are disposed in a polycrystalline semiconductor layer, and a width of a channel of the third transistor is in a range of about 1 μm to about 2 μm, and a length of the channel of the third transistor is in a range of about 1 μm to about 2.5 μm.

A display device includes a substrate, a semiconductor layer on the substrate, the semiconductor layer comprising a first semiconductor portion, a first insulating layer on the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the first semiconductor portion, a scan line disposed on the first insulating layer and extending in a first direction, a second insulating layer on the first gate electrode and the scan line, a data line on the second insulating layer, and a first driving voltage line on the second insulating layer. The first driving voltage line may include a first portion extending in a second direction crossing the first direction, and a second portion expanding from the first portion in the first direction. The first portion may overlap the scan line, and the second portion may overlap the first gate electrode in a plan view to form a storage capacitor.

The disclosure provides a thin film transistor, a method of manufacturing the thin film transistor, an array substrate and a display device, belongs to the field of display technology, and can solve the problem that an existing thin film transistor is prone to cracking or breaking due to bending. The thin film transistor of the present disclosure includes a substrate and an active layer arranged on the substrate, and at least one groove is arranged on a surface of the active layer distal to the substrate.

A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.

A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

A display device includes a thin-film transistor layer disposed on a substrate and including thin-film transistors; and an emission material layer disposed on the thin-film transistor layer. The emission material layer includes light-emitting elements each including a first light-emitting electrode, an emissive layer and a second light-emitting electrode, light-receiving elements each including a first light-receiving electrode, a light-receiving semiconductor layer and a second light-receiving electrode, and a first bank disposed on the first light-emitting electrode and defining an emission area of each of the light-emitting elements. The light-receiving elements are disposed on the first bank.

A display substrate, a preparation method and driving method therefor, and a display apparatus. The display substrate includes a substrate and a switch structure arranged on the substrate, the switch structure being electrically connected to a control signal terminal, a signal input terminal and a signal output terminal. The switch structure comprises a switching unit. The switching unit comprises a first transistor and a second transistor; and the types of the first transistor and the second transistor are opposite. The first transistor comprises: a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The second transistor comprises: a second active layer, a second gate electrode, a second source electrode, and a second drain electrode.

An organic light emitting diode (OLED) display is disclosed. In one aspect, the display includes a scan line transmitting a scan signal, a data line crossing the scan line and transmitting a data voltage, and a driving voltage line crossing the scan line and configured to transmit a driving voltage. The display also includes a switching transistor electrically connected to the scan line and the data line. The display further includes a driving transistor and a compensation transistor. A driving gate electrode and a driving drain electrode are respectively connected to a compensation source electrode and a compensation drain electrode. The display also includes a light blocking layer at least partially covering the compensation transistor and an OLED electrically connected to the driving transistor.