An array substrate, a display panel and a method for manufacturing the array substrate are provided. The array substrate further includes a first via and a second via. A conductive layer fills the first via and the second via to electrically connect the first metal layer and the second metal layer. The first via is disposed on a side of the second via, and a passivation layer partially extends between the first via and the second via. The display panel includes the above-mentioned array substrate.

Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

The purpose of the present invention is to realize the TFT of the oxide semiconductor having a superior characteristics and high reliability during the product's life. The structure of the present invention is as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed on the first oxide semiconductor, the first gate insulating film is a laminated film of a first silicon oxide film and a first aluminum oxide film, a gate electrode is formed on the first aluminum film.

The present invention provides a manufacturing method of an array substrate, including steps of: providing a flexible substrate layer, forming a buffer layer, forming an active layer, forming a gate insulating layer, forming a gate layer, forming an interlayer insulating layer, forming a source and drain layer, forming an organic planarization layer, forming an anode layer. An array substrate manufactured by the above manufacturing method, and the array substrate includes laminated a flexible substrate layer, a buffer layer, an active layer, a gate insulating layer, a gate layer, an interlayer insulating layer, a source and drain layer, an organic planarization layer, and an anode layer, which are disposed in a stack.

An array substrate, a method of manufacturing the same, and a display panel are provided. The method includes: providing a base substrate including a display area and a wiring area at a periphery of the display area; in the process of forming a connection electrode in the wiring area, remaining a first photoresist layer for performing the patterning process and covering the connection electrode; depositing a film of reflective pixel electrode layer on the base substrate and performing a patterning process on the film of reflective pixel electrode layer to form a reflective pixel electrode layer in the display area and to remove the film of reflective pixel electrode layer in the wiring area to expose the first photoresist layer; removing a second photoresist layer for patterning the thin film of reflective pixel electrode layer on the reflective pixel electrode layer with the first photoresist layer in the wiring area.

A display device may include a substrate, a barrier layer disposed on the substrate and having a trench, an active pattern disposed on the barrier layer, formed of an oxide semiconductor, and including a channel region protruding downward along a profile of the trench, and a source region and a drain region disposed at each end of the channel region, respectively, a gate electrode disposed on the active pattern and overlapping the channel region, a source electrode disposed on the gate electrode and electrically connected to the source region, and a drain electrode disposed on the gate electrode and electrically connected to the drain region.

The present disclosure provides a display backplane and a method for manufacturing the same, a display panel, and a display device. The display backplane includes: a substrate; a first thin film transistor located on one side of the substrate; and a second thin film transistor located on the one side of the substrate, wherein: the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, wherein the first active layer and the second active layer are located in a same layer, and a material of the first active layer is different from that of the second active layer.

A thin film transistor array substrate and an electronic device including the thin film transistor array are disclosed. The thin film transistor comprises a substrate, a first active layer on the substrate, a gate electrode on the first active layer, a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer. The gate electrode is configured to drive the first active layer and the second active layer. Thereby, it is possible to provide the thin film transistor array substrate including one or more thin film transistors having high current characteristics in a small area, and the electronic device including the thin film transistor array substrate.

An array substrate, includes: a substrate, three metal layers stacked on the substrate, and a plurality of signal line leads disposed in a peripheral area of the array substrate. The plurality of signal line leads are distributed in at least two of the three metal layers.

An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first thin film transistor located on the base substrate and including a first active layer; and a second thin film transistor located on the base substrate and including a second active layer; a matrix material of the first active layer is the same as that of the second active layer, and the first active layer and the second active layer satisfy at least one of the following conditions: a carrier mobility of the first active layer is greater than that of the second active layer, and a carrier concentration of the first active layer is greater than that of the second active layer. The array substrate is employed to compensate a difference in threshold voltage caused by a difference in channel width-to-length ratio of different thin film transistors.