A thin film transistor, an array substrate and a display device. The thin film transistor includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion; and a first intermediate portion connecting the first overlapping end and the first compensation end.

A display substrate, a manufacturing method therefor and a pixel driving circuit, the display substrate includes: a base substrate; a first conductive layer, which includes a first signal line, a second signal line, and an additional pad layer, on the base substrate; a pixel defining layer on the first conductive layer and having an opening; and an electroluminescent material layer in the opening and including a first end portion and a second end portion, an orthographic projection of the first end portion on the base substrate falls within that of the first signal line, an orthographic projection of the second end portion on the base substrate falls within that of the additional pad layer, and the orthographic projections of the first end portion and the second end portion are respectively located on both sides of an orthographic projection of the second signal line on the base substrate.

A display panel includes a base layer, a signal line which is disposed on the base layer and includes a first layer including aluminum and a second layer disposed directly on the first layer and consisting of niobium, a first thin film transistor connected to the signal line, a second thin film transistor disposed on the base layer, a capacitor electrically connected to the second thin film transistor, and a light emitting element electrically connected to the second thin film transistor.

A display device includes pixels, scan lines, and data lines. A first driving gate electrode is disposed at a first pixel of the display device. A second driving gate electrode is disposed at a second pixel of the display device. A first driving voltage line includes a first extending part that overlaps a first driving gate electrode. A second driving voltage line includes a second extending part that overlaps a second driving gate electrode. A first pixel electrode of the first pixel overlaps the second driving gate electrode. The second extending part includes a first recess portion. A center line of the first recess portion is offset in a direction away from the first pixel electrode with respect to a center line of the second driving gate electrode.

Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and include a capture agent for analyte detection. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.

An active matrix substrate is provided with a plurality of oxide semiconductor TFTs including a plurality of first TFTs. An oxide semiconductor layer of each oxide semiconductor TFT includes a channel region, a source contact region, and a drain contact region. In a view from a normal direction of the substrate, the channel region is a region located between the source contact region and the drain contact region and overlapping a gate electrode, and the channel region includes a first end portion and a second end portion that oppose each other and extend in a first direction from the source contact region side toward the drain contact region side, a source side end portion that is located on the source contact region side of the first and second end portions and extends in a second direction that intersects the first direction, and a drain side end portion that is located on the drain contact region side of the first and second end portions and extends in the second direction. Each first TFT further includes a light blocking layer located between the oxide semiconductor layer and the substrate. In a view from the normal direction of the substrate, the light blocking layer includes an opening region that overlaps part of the channel region and a light blocking region that overlaps another part of the channel region. In a view from the normal direction of the substrate, the light blocking region includes a first light blocking portion that extends in the first direction over the first end portion of the channel region and a second light blocking portion that extends in the first direction over the second end portion of the channel region; each of the first light blocking portion and the second light blocking portion includes a first edge portion and a second edge portion that oppose each other and extend in the first direction; at least part of the first edge portion overlaps the channel region; and the second edge portion is located on an outer side of the channel region and does not overlap the channel region.

A pixel structure and a manufacturing method therefor, an array substrate, and a display device are provided. The pixel structure includes a pixel electrode, an active layer, a source/drain electrode layer, and a common electrode which are located on a base substrate. The pixel electrode is located between the base substrate and the common electrode. The source/drain electrode layer includes a first electrode and a second electrode which are electrically connected to the active layer, and the second electrode is electrically connected to the pixel electrode. The active layer is located between the base substrate and the source/drain electrode layer. The active layer includes a first surface close to the source/drain electrode layer. The source/drain electrode layer includes a second surface close to the active layer. Partial edge of the first surface is aligned with partial edge of the second surface.

A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

An organic light emitting diode display device includes: a substrate including a plurality of sub-pixels classified into a plurality of horizontal pixel lines; a gate line and a sensing line spaced apart from each other on the substrate; a data line and a power line crossing the gate line and the sensing line and spaced apart from each other; and first and second reference lines supplying first and second reference voltages, respectively, and connected to adjacent two, respectively, of the plurality of horizontal pixel lines.

A display device includes pixels connected to scan lines and data lines intersecting the scan lines, wherein each of the pixels includes a light-emitting element, a driving transistor to control a driving current supplied to the light-emitting element according to a data voltage applied from the data lines, and a switching transistor to apply the data voltage of the data line to the driving transistor according to a scan signal applied from the scan lines. The driving transistor includes a first active layer having an oxide semiconductor and a first gate electrode below the first active layer. The switching transistor includes a second active layer having a same oxide semiconductor as the oxide semiconductor of the first active layer and a second gate electrode below the second active layer. At least one of the driving transistor and the switching transistor includes an oxide layer above each of the active layers.