Disclosed are an oxide thin film transistor (TFT), a method of manufacturing the same, and a display panel and a display device using the same, in which a first conductor and a second conductor are provided at end portions of a semiconductor layer formed of oxide semiconductor. The first conductor and second conductor are electrically connected to a first electrode and a second electrode, and covered by a gate insulation layer. The oxide TFT includes a semiconductor layer provided on a buffer and including an oxide semiconductor, a gate insulation layer covering the semiconductor layer and the buffer, a gate electrode provided on the gate insulation layer to overlap a portion of the semiconductor layer, and a passivation layer covering the gate and the gate insulation layer.

Disclosed is a display device, including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area as a plurality of pixel rows and a plurality of pixel columns; data lines configured to provide a data signal; scan lines configured to provide a scan signal; first power lines configured to provide a power source to the pixel columns; and a second power line connected to the first power lines and disposed in the peripheral area. A scan line connected to an i.sup.th pixel row may apply a scan signal to the i.sup.th pixel row, and a branched line branched from the scan line may apply an initialization signal to a k.sup.th pixel row (k≠i). A branched point of the scan line is disposed between a pixel most adjacent to the second power line of the i.sup.th pixel row and the second power line.

A method of manufacturing a pixel structure of a liquid crystal display panel includes providing a substrate, forming a pixel electrode and a switch device that is electrically connected to the pixel electrode on the substrate, forming an insulating layer that covers the switch device and the pixel electrode on the substrate, forming a common electrode layer on the insulating layer, forming a patterned photoresist layer that includes a plurality of discontinuous patterns on the common electrode layer, performing a first etching process to remove a portion of the common electrode layer so as to forma patterned common electrode, performing a second etching process to remove part of a surface of the insulating layer so as to form a plurality of trenches, wherein the patterned common electrode does not cover the plurality of trenches, and removing the patterned photoresist layer.

A display module including a substrate having a plurality of pixels, a data line that supplies a data signal to a pixel, a current supply line that supplies electric current to the pixel, a data driving circuit that supplies a data signal to the data line, and a gate driving circuit thereon. The plurality of pixels are arranged in a display area of the substrate, and each of the plurality of pixels includes a light emitting device, a first thin film transistor connected to the data line that supplies the data signal, a second thin film transistor connected to the current supply line, and a capacitor. The light emitting device includes a first electrode layer connected to the second thin film transistor, an organic layer formed on the first electrode layer, and a second electrode layer formed on the organic layer.

Provided is a digital circuit (30) that comprises: a switching circuit (31) having first transistors (32, 33) supplied with power supply potentials (VDD, VSS): correcting circuits (34, 36) connected between an input terminal (IN) inputted with an input signal and control terminals (gates) of the first transistors; capacitors (C2, C3) connected between the control terminals and the input terminal; diode-connected second transistors (35, 37) that are provided between nodes (N5, N6) between the capacitors and the control terminals and the power supply potentials and have the substantially same threshold voltage as the first transistors; and switches (SW2, SW3) connected in series with the second transistors.

It is an object of the present invention to connect a wiring, an electrode, or the like formed with two incompatible films (an ITO film and an aluminum film) without increasing the cross-sectional area of the wiring and to achieve lower power consumption even when the screen size becomes larger. The present invention provides a two-layer structure including an upper layer and a lower layer having a larger width than the upper layer. A first conductive layer is formed with Ti or Mo, and a second conductive layer is formed with aluminum (pure aluminum) having low electric resistance over the first conductive layer. A part of the lower layer projected from the end section of the upper layer is bonded with ITO.

Embodiments of the invention provide an array substrate, a display device and a manufacturing method of the array substrate. The array substrate comprises a substrate (10) and a plurality of electrostatic discharge short-circuit rings (20) provided on the substrate. Each of the electrostatic discharge short-circuit rings (20) comprises a gate electrode (22), a gate insulating layer (26), an active layer (21), a source electrode (23), a drain electrode (24) and a passivation layer (30). Each of the electrostatic discharge short-circuit ring (20) further comprises a transparent conductive layer (25) for connecting the gate electrode (22) and the drain electrode (24), and the transparent conductive layer (25) is provided below the passivation layer (30).

Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.

A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.

A thin film transistor substrate includes a data line, a gate line, a gate electrode, a source electrode, a first drain electrode, a semiconductor layer and a second drain electrode. The data line and the gate line cross each other on a base substrate. The gate electrode is electrically connected to the gate line. The source electrode is electrically connected to the data line. The first drain electrode and the source electrode face each other. The semiconductor layer serves as a channel between the source electrode and the first drain electrode. The second drain electrode is disposed on the first drain electrode. The second drain electrode is electrically connected to the first drain electrode.