H01L27/124

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
20180011356 · 2018-01-11 ·

The present disclosure discloses an array substrate, a display device and manufacturing methods thereof. The array substrate comprises: a base, a gate metal layer, an active layer, a source/drain metal layer, and a pixel electrode layer, wherein the array substrate has a storage capacitor region; in the storage capacitor region, the gate metal layer, the active layer, the source/drain metal layer and the pixel electrode layer comprise respective patterns; wherein, the projections of the gate metal layer storage pattern, the active layer storage pattern, the source/drain metal layer storage pattern, and the pixel electrode layer storage pattern on the base at least partially overlap, and the pixel electrode layer storage pattern is electrically connected to the gate metal layer storage pattern to form a first electrode of the storage capacitor, the active layer storage pattern is electrically connected to the source/drain metal layer storage pattern to form a second electrode.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME

According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.

ARRAY SUBSTRATE AND DISPLAY DEVICE
20180012907 · 2018-01-11 ·

An array substrate and a display device are disclosed. The array substrate includes: a base substrate; gate lines and data lines disposed on the base substrate; and display units defined by intercrossing of the data lines and the gate lines, in which each display unit is provided with a thin-film transistor, a sub-pixel electrode and a common electrode line; and the common electrode line comprises a main electrode line, an extension direction of which is the same as an extension direction of the gate lines, and branch electrode lines connected with the main electrode line. The present disclosure reduces the overall resistance of common electrode lines by branch electrode lines connected with main electrode lines, effectively reduces the phenomenon of common electrode signal delay and improves the display quality of a display panel.

Array substrate and touch panel and manufacturing method of array substrate

An array substrate, a touch panel and a manufacturing method of an array substrate are provided. The array substrate includes a base substrate and a plurality of gate lines, a plurality of data lines, a common electrode layer and a plurality of pixel units arranged in an array disposed on the base substrate. Each of the pixel units includes a plurality of sub-pixel units defined by gate lines and data lines disposed to intersect each other laterally and vertically. The common electrode layer includes a plurality of common electrode blocks that double as self-capacitance electrodes, each of the common electrode blocks is connected with at least one wire, and the wires are in the middle of sub-pixel units of a same column.

DISPLAY DEVICE
20180013007 · 2018-01-11 · ·

The purpose of the invention is suppressing a kink phenomenon and improvoning the image quality of a display device. The display device has a TFT in a pixel. The TFT has a semiconductor layer, a first insulating layer under the semiconductor layer, a second insulating layer over the semiconductor layer, and a gate electrode facing the semiconductor layer with a gap. The gate electrode has a first gate electrode portion facing a lower surface of the semiconductor layer, a second gate electrode portion facing an upper surface of the semiconductor layer, and a third gate electrode portion facing a lateral surface of the semiconductor layer and connected to the first and second gate electrode portions. A laminated part where the first and second insulating layers are stacked is around the semiconductor layer, and a part of the laminated part is between the lateral surface and the third gate electrode portion.

DISPLAY CONTROL ELEMENT AND DISPLAY DEVICE
20180011382 · 2018-01-11 ·

Provided is a display control element which can improve a display device in driving speed. A display control element (A) includes a semiconductor layer (l) having a counter surface (p) connected to a gate line (GL), a source electrode (s) provided on a side of the semiconductor layer (l) and connected to a source line (SL), and drain electrodes (da and db) provided on the side of the semiconductor layer (l) and connected to the same pixel (P). The gate surface, the source electrode (s), and each of the drain electrodes constitute a single thin film transistor.

MATRIX DEVICE AND MANUFACTURING METHOD OF MATRIX DEVICE
20180012908 · 2018-01-11 · ·

In a matrix device having two or more systems of electrode groups such as X and Y systems, the one or more electrode groups are grouped into groups each consisting of a plurality of pixel electrodes, connection wires are branched off and connected to the pixel electrodes so that the same signal is not supplied to the pixel electrodes of the same group but the same signal is supplied to one pixel electrode of two or more groups, switching elements are provided corresponding to the individual pixel electrodes, and a gate electrode and a gate insulating film of the switching elements are used in common in the same group. Accordingly, in the matrix device and manufacturing of the matrix device, the number of connection wires and driver ICs is reduced.

THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE USING THE SAME

A thin film transistor (TFT) substrate and a display device using the same are disclosed. The TFT substrate includes a first TFT including a polycrystalline semiconductor layer, a first gate electrode, a first source electrode, and a first drain electrode deposited on a substrate, a second TFT separated from the first TFT, the second TFT including a second gate electrode, an oxide semiconductor layer, a second source electrode, and a second drain electrode deposited on the first gate electrode, and a plurality of storage capacitors separated from the first and second TFTs, each storage capacitor including a first dummy semiconductor layer, a first gate insulating layer on the first dummy semiconductor layer, a first dummy gate electrode on the first gate insulating layer, and an intermediate insulating layer on the first dummy gate electrode.

Thin-film transistor array and method of producing the same
11709406 · 2023-07-25 · ·

A thin-film transistor array includes an insulating substrate and pixels each including a thin-film transistor, a pixel electrode, and a capacitor electrode, the pixels being formed in a matrix and located at positions where column wirings extending in a column direction intersect row wirings perpendicular to the column wirings and extending in a row direction. The thin-film transistor includes a gate electrode, a source electrode, a drain electrode, and a semiconductor pattern formed between the source electrode and the drain electrode. The pixel electrode includes two electrically conductive layers which are a lower layer electrode serving as a lower pixel electrode, and an upper layer electrode serving as an upper pixel electrode. The corresponding one of the column wirings is at a position which has no overlap with the capacitor electrode and the lower pixel electrode, and has an overlap with the upper pixel electrode, in the lamination direction.

Display device and method of fabricating the same

A display device includes a substrate including a display area and a non-display area, and a first surface and a second surface; pixels disposed on the first surface; a signal line disposed on the first surface, and electrically connected to each pixel; a cushion layer disposed on the pixels and the signal line, and including at least one contact hole that exposes a portion of the signal line; a connector disposed in the at least one contact hole and electrically connected to the signal line; and a driver disposed on the cushion layer and electrically connected to the pixels through the connector. Each pixel includes a display element layer disposed on the first surface and including at least one light emitting element, and a pixel circuit layer disposed on the display element layer and including at least one transistor electrically connected to the at least one light emitting element.