An apparatus comprising: a module; a substrate; and electrolyte between the module and the substrate, wherein an electronic component is formed between the module and the substrate and wherein the electrolyte is configured to function as the electrolyte in the electronic component and also as the adhesive to attach the module to the substrate.

The disclosure provides a manufacturing method for COA substrate: utilizing PEDOT, PProDOT or PEDOT derivatives with or without doping with graphene, or PProDOT derivatives replaces traditional ITO to be conductive materials of pixel electrodes; quantum dots can be modified by ProDOT derivatives or EDOT derivatives which including carboxyl group, and quantum dot color filters of red filter layers, green filter layer and blue filters layers comprised on the TFT substrate are formed by the method of electric chemical deposition based on a property of the aforementioned two being able to polymerize under influences of electric field and pixel electrode patterns on the TFT substrate. Therefore, zero waste can be achieved in quantum dots, a usage of quantum dots can be decreased, indium usage can be decreased, researching and development cost can be reduced, and the circumstances can be protected, furthermore, the QDs color film having the better bonding strength bonds the counter electrode layer through chemical bond, and avoids adverse results as a peel is caused by insufficient bonding strength between photoresist and substrate.

A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

Provided is a method for preparing a display substrate. The method includes: providing a substrate, the substrate including a plurality of pixel island regions spaced apart and a plurality of bridge regions connecting adjacent pixel island regions; forming thin film transistors and first signal lines in the pixel island regions, and forming first connecting bridges in the bridge regions; and forming second signal lines, second connecting bridges, and a source/drain layer on the substrate by a one-time patterning process.

A display panel and manufacturing method thereof, and a display device. The display region includes first wire and second wire. The non-display region includes third wire and fourth wire. The first wire includes first-type first wire, first-type first wire including first sub wire and second sub wire spaced apart between third wire and fourth wire. The second wire includes first-type second wire; third wire includes first repair line. The fourth wire includes second repair line, and the first sub wire and second sub wire are electrically connected to second repair line through first repair line and first-type second wire. The first wire includes second-type first wire, and second-type first wire is continuous between third wire and fourth wire; second wire includes second-type second wire, second-type second wire transmitting first common signal.

An array substrate includes a base substrate, a display region formed on the base substrate, and a non-display region formed on the base substrate around the display region. The non-display region includes a detection line that is provided on the base substrate, and a surface of the detection line away from the base substrate is provided in an undulating shape. A display device is further disclosed.

A display panel and a method for manufacturing the same, and a display device is provided. The display panel includes a display area including a plurality of gate lines arranged spaced apart in a first direction and a non-display area including a first and a second non-display area. At least one of the first or the second non-display area includes: a gate driving area including a plurality of gate driving units arranged spaced apart in the first direction and connected to the gate lines, a length of at least one gate driving unit being smaller than a length of a pixel in the first direction; a dummy gate driving area including a plurality of dummy gate driving units arranged spaced apart in the first direction; and a first trace area including a plurality of first traces connected to the dummy gate driving units and an external circuit.

A memory device includes a plurality of memory cells. A first memory cell of the plurality of memory cells includes a first write transistor includes a first write gate, a first write source, and a first write drain. A first read transistor includes first read gate, a first read source, a first read drain, and a first body region separating the first read source from the first read drain. The first read source is coupled to the first write source. A first capacitor has a first upper capacitor plate coupled to the first write drain and a first lower capacitor plate coupled to the first body region of the first read transistor.

A method of manufacturing an array substrate, includes: providing a substrate; forming a gate conductive layer including at least one first alignment mark; forming a source-drain conductive thin film; aligning a first mask and the substrate on which the gate conductive layer and the source-drain conductive thin film have been formed according to the at least one first alignment mark; patterning the source-drain conductive thin film by using the first mask to form at least one second alignment mark to obtain a source-drain conductive layer; forming a black matrix thin film; aligning a second mask and the substrate on which the gate conductive layer, the source-drain conductive layer and the black matrix thin film have been formed according to the at least one second alignment mark; patterning the black matrix thin film by using the second mask to form a black matrix; and forming a color filter layer.

An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate; a first electrode located on the base substrate and including a pad portion, the pad portion including a first surface and a second surface, the second surface being closer to the base substrate than the first surface; a first insulation layer located on the first electrode and including a first via hole; a second insulation layer located on the first insulation layer and including a second via hole; and a second electrode located on the second insulation layer; the second electrode is electrically connected with the first electrode at the pad portion through the first via hole and the second via hole, and an orthographic projection of the pad portion on the base substrate falls within an orthographic projection of the second via hole on the base substrate.