A display device includes a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor, a second capacitor electrode disposed on the first conductive layer and overlapping the first capacitor electrode in a plan view to constitute a first capacitor, a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor, a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer, and a third conductive layer disposed over the second conductive layer to implement a high-resolution image by overlapping the first capacitor electrode, the second capacitor electrode, and the third capacitor electrode.

Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.

A display device may include pixels, each of the pixels including first and second lower electrodes disposed on a substrate; first and second upper electrodes respectively disposed on the first and second lower electrodes; a first insulating layer including a first contact hole exposing a portion of the first lower electrode, and a second contact hole exposing a portion of the second lower electrode; a first pixel electrode disposed on the first insulating layer, and contacting the first lower electrode through the first contact hole; a second pixel electrode disposed on the first insulating layer, and contacting the second lower electrode through the second contact hole; and a light emitting element disposed between the first and second upper electrodes. The first and second pixel electrodes may be respectively and electrically connected with the first and second upper electrodes.

A manufacturing method of an electronic device is provided by the present disclosure. The method includes: providing a substrate including a non-discarding portion and a discarding portion adjacent to the non-discarding portion; forming a first test wiring extending through the non-discarding portion and the discarding portion; cutting the substrate on a target line, wherein the target line is aligned with a boundary between the non-discarding portion and the discarding portion; performing a first conducting test on the first test wiring; and determining the substrate to be in an off-target cutting state when a result of the first conducting test is a short circuit state, or determining the substrate to be in an on-target cutting state when the result of the first conducting test is an open circuit state.

An apparatus for manufacturing a display device, the apparatus including: a head portion configured to fix a driving chip; a heater portion coupled to the head portion; a booster portion connected to the head portion; a converter portion connected to the booster portion and configured to vibrate the head portion; and a cooling portion arranged at the converter portion or the booster portion and configured to cool the converter portion or the booster portion by supplying a gas to the converter portion or the booster portion.

A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings spaced apart from each other; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer as the electrode pads and the semiconductor stacked layer are energized by the driving backplane.

A method for repairing a substrate and an electronic device are disclosed, wherein the electronic device includes: a substrate; a patterned metal layer disposed on the substrate, and the patterned metal layer including a first metal section and a second metal section which is disconnected to the first metal section, wherein at least one of the first metal section and the second metal section has a through hole; and a first conductive layer electrically connected to one of the first metal section and the second section by the through hole; wherein the first conductive layer has a protrusion, the protrusion locating outside the through hole.

A display device includes: a substrate including a display area and a non-display area; a transistor and a light emitting element, which are disposed on the display area; a pad portion disposed in the non-display area, where the pad portion includes a first metal pattern; and a printed circuit board or a data driver, which is connected with the pad portion. The transistor includes a semiconductor layer disposed on the substrate and a source electrode or a drain electrode which is electrically connected with the semiconductor layer. The source electrode or the drain electrode includes a first layer including a first metal, a second layer including a second metal, and a third layer including the first metal, where the first metal pattern includes the first metal, and is connected with the printed circuit board or the data driver.

An electrostatic protection circuit and a manufacturing method thereof, an array substrate, and a display device are provided. The electrostatic protection circuit includes: at least one first transistor and at least one second transistor. A gate electrode and a first electrode of the first transistor are connected to a first signal line, and a second electrode of the first transistor is connected to a second signal line. A gate electrode and a first electrode of the second transistor are connected to the second signal line, and a second electrode of the second transistor is connected to the first signal line.

A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.