A method of transferring different types of micro devices is provided. The method includes: assembling a first detachable transfer plate with first type micro devices thereon to an alignment assistive mechanism which is substantially above a receiving substrate, wherein the first type micro devices face the receiving substrate; aligning the first type micro devices on the first detachable transfer plate with positions of first sub-pixels respectively of pixels on the receiving substrate by the alignment assistive mechanism; transferring the first type micro devices to the first sub-pixels on the receiving substrate; replacing the first detachable transfer plate with a second detachable transfer plate with second type micro devices thereon, wherein the second type micro devices face the receiving substrate; and transferring the second type micro devices to second sub-pixels respectively of the pixels on the receiving substrate.

Embodiments herein describe techniques for bonded wafers that includes a first wafer bonded with a second wafer, and a stress compensation layer in contact with the first wafer or the second wafer. The first wafer has a first stress level at a first location, and a second stress level different from the first stress level at a second location. The stress compensation layer includes a first material at a first location of the stress compensation layer that induces a third stress level at the first location of the first wafer, a second material different from the first material at a second location of the stress compensation layer that induces a fourth stress level different from the third stress level at the second location of the first wafer. Other embodiments may be described and/or claimed.

An arrangement for joining two joining members includes a first part having a support surface, a first carrier element configured to carry at least one foil, a transportation unit configured to arrange the first carrier element such that the foil is arranged above the support surface in a vertical direction, and a second part configured to exert pressure to a joining stack, when the joining stack is arranged on the support surface. The joining stack includes a first joining member arranged on the support surface, a second joining member, and an electrically conductive connection layer arranged between the joining members. When pressure is exerted to the joining stack, the foil is arranged between the second part and the joining stack and is pressed onto the joining stack and the joining stack is pressed onto the first part, compressing the connection layer and forming a substance-to-substance bond between the joining members.

A method for transferring a micro device is provided. The method includes: preparing a transfer plate with the micro device thereon in which the micro device is in contact with a picked-up surface of the transfer plate; forming a structure including the micro device, a contact pad of a receiving substrate, and some water therebetween in which two opposite surfaces of the water are respectively in contact with the micro device and a bound surface of the contact pad, and a hydrophilicity of the bound surface of the contact pad facing the transfer plate is greater than a hydrophilicity of the picked-up surface of the transfer plate facing the receiving substrate; and evaporating the water such that the micro device is bound to and in contact with the contact pad.

Systems and methods are provided for producing an integrated circuit package, e.g., an SOIC package, having reduced or eliminated lead delamination caused by epoxy outgassing resulting from the die attach process in which an integrated circuit die is attached to a lead frame by an epoxy. The epoxy outgassing may be reduced by heating the epoxy during or otherwise in association with the die attach process, e.g. using a heating device provided at the die attach unit. Heating the epoxy may achieve additional cross-linking in the epoxy reaction, which may thereby reduce outgassing from the epoxy, which may in turn reduce or eliminate subsequent lead delamination. A heating device located at or near the die attach site may be used to heat the epoxy to a temperature of 55 C.5 C. during or otherwise in association with the die attach process.

An object of the present invention is to provide a semiconductor device in which peeling between a mold resin and a substrate is suppressed. A semiconductor device 1 includes a semiconductor chip 20 and a substrate 10 that are molded with a mold resin layer 40. The semiconductor device 1 includes a resin layer 50 having a thickness of 200 nm or less different from the mold resin layer 40 between the cured mold resin layer 40 and the substrate 10. The resin layer 50 present between the mold resin layer 40 and the substrate 10 is preferably present on a periphery of 30% or more of the chip when an entire peripheral length of the chip is 100%.

An object of the present invention is to provide a semiconductor device in which peeling between a mold resin and a substrate is suppressed. A semiconductor device 1 includes a semiconductor chip 20 and a substrate 10 that are molded with a mold resin layer 40. The semiconductor device 1 includes a resin layer 50 having a thickness of 200 nm or less different from the mold resin layer 40 between the cured mold resin layer 40 and the substrate 10. The resin layer 50 present between the mold resin layer 40 and the substrate 10 is preferably present on a periphery of 30% or more of the chip when an entire peripheral length of the chip is 100%.

A method includes steps a) providing the first structure successively including a first substrate, a first layer made from a metal base and a first metal-based metal oxide, b) providing the second structure successively including a second substrate, a second layer made from a second material and a second metal-based metal oxide, the first and second metal oxides presenting a standard free enthalpy of formation G, the second material being chosen so that it has an oxide presenting a standard free enthalpy of formation strictly less than G, c) bonding the first structure and second structure by direct adhesion, d) activating diffusion of the oxygen atoms of the first and second metal oxides to the second layer so as to form the oxide of the second material.

Techniques and mechanisms for forming a bond between wafers using a compliant layer. In an embodiment, a layer or layers of one or more compliant materials is provided on a first surface of a first wafer, and the one or more compliant layers are subsequently bonded to a second surface of a second wafer. The bonded wafers are heated to an elevated temperature at which a compliant layer exhibits non-elastic deformations to facilitate relaxation of stresses caused by wafer distortions. In another embodiment, a material of the compliant layer exhibits viscoelastic behavior at room temperature, wherein stress is mitigated by allowing wafer distortion to relax at room temperature.

A semiconductor structure is provided. A first semiconductor device includes a first conductive layer formed over a first substrate; a first etching stop layer formed over the first conductive layer, and the first etching stop layer is in direct contact with the first conductive layer. A first bonding layer is formed over the first etching stop layer, and a first bonding via is formed through the first bonding layer and the first etching stop layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over the second etching stop layer and a second bonding via formed through the second bonding layer and a second etching stop layer. A bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.