Disclosed is an electronic circuit. The electronic circuit includes a first transistor device, a second transistor device, and a third transistor device, each having a control node and a load path. The electronic circuit further includes a drive circuit. The load paths of the first and second transistor devices are connected in parallel, the load path of the third transistor device is connected in series with the load paths of the first and second transistor devices, and the first transistor device and the second transistor device are integrated in a common semiconductor body. The drive circuit is configured, based on a control signal, to successively switch on the first transistor device and the second transistor device, so that the second transistor device is switched on when the first transistor device is in an on-state.

A driver metal-oxide-semiconductor field-effect transistor DrMOS, an integrated circuit, an electronic device, and a preparation method are provided. The DrMOS mainly includes a first die and a second die. The first die includes a drive circuit and a first switching transistor, and the drive circuit is connected to a gate of the first switching transistor. The second die includes a second switching transistor, and the drive circuit is connected to a gate of the second switching transistor through a first conductor. The drive circuit and the first switching transistor are prepared in a same die. This helps to reduce an area, loss, and costs of the DrMOS. The first switching transistor and the second switching transistor are prepared in different dies that reduces type selection limitation.

A bootstrapping gate driver circuit in which the size of the bootstrap capacitors is reduced. The gate-to-source voltage of the high side (pull-up) FET is pre-driven to an initial voltage (pre-driven voltage) before the bootstrap capacitor releases charge to charge up the gate-to-source voltage of the high side FET. This pre-driven voltage is applied through a pre-driven FET that allows current flow from the supply voltage to charge the gate of the high side FET to the pre-driven voltage. The pre-driven FET is turned on by a turn-on signal that occurs before the bootstrap capacitor releases charge. The pre-driven period (and hence, the pre-driven voltage) is determined from the time that the pre-driven FET begins to turn on, to the time that the bootstrap capacitor starts to release charge.

A semiconductor device drive circuit includes a first drive circuit and a second drive circuit. The first drive circuit generates a control signal for controlling a voltage-controlled switching element. The first drive circuit generates a control signal in synchronization with a voltage signal input to the first drive signal. The first drive circuit has an output current capability corresponding to a magnitude of the voltage signal. The second drive circuit outputs a voltage signal to the first drive circuit. The second drive circuit includes an output adjustment circuit that adjusts the magnitude of the voltage signal.

An example circuit includes a plurality of light emitters connected in parallel between a first node and a second node. The circuit also includes a plurality of capacitors, with each capacitor corresponding to one of the light emitters, and a plurality of discharge-control switches, with each discharge-control switches corresponding to one of the capacitors. The circuit further includes a pulse-control switch connected to the plurality of light emitters. During a first period, the pulse-control switch restricts current flow, and each of the plurality of capacitors is charged via the first node. During a second period, one or more of the plurality of discharge-control switches allows current flow that discharges one or more corresponding capacitors. During a third period, the pulse-control switch allows current flow that discharges one or more undischarged capacitors of the plurality of capacitors through one or more corresponding light emitters.

Disclosed is an electronic drive circuit and a drive method. The drive circuit includes an output; a first output transistor comprising a control node and a load path, wherein the load path is coupled between the output and a first supply node; a voltage regulator configured to control a voltage across the load path of the first output transistor; and a first driver configured to drive the first output transistor based on a first control signal.

A bi-directional voltage converter of a smart card includes switching elements connected between an input node and an output node and a start-up transistors whose channel width over channel length is smaller than a channel width over channel length of the switching element. The bi-directional voltage converter stores a driving voltage applied to an output node in a storage capacitor during a booting operation and provides the voltage stored in the storage capacitor to an input node. The bi-directional voltage converter may boost another driving voltage at the input node step-wisely and may perform bi-directional voltage converting with reduced occupied area and high efficiency.

Embodiments of systems, methods, and apparatus for improving ESD performance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on Semiconductor-On-Insulator (“SOI”) and Silicon-On-Sapphire (“SOS”) substrates.

A bootstrapping circuit that utilizes multiple pre-charged capacitor voltages and applies the capacitor voltages to the high side FET of a GaN bootstrapping driver. During the pre-charging phase of the bootstrapping driver, multiple capacitors are charged in parallel to the supply voltage. During the driving phase of the bootstrapping driver, the capacitors are connected in series through a number of FETs and connected to the gate terminal of the high side FET of the bootstrapping driver. As a result, the gate-to-source voltage of the high side FET is equal to or greater than the supply voltage during the driving phase, increasing the driving capability of the high side FET and reducing the total required capacitance and die area of the bootstrapping driver.

A circuit to enhance the driving capability of conventional inverting bootstrapping GaN drivers. When the inverting driver input is logic high and the driver output is off, the voltage stored on the first bootstrap capacitor for turning on the high side (pull-up) FET of the inverting driver is charged to the full supply voltage using an active charging FET, instead of using a diode or diode-connected FET in a conventional bootstrapping driver. The gate voltage of the active charging FET is bootstrapped to a voltage higher than supply voltage by a second bootstrap capacitor that connects to the inverting driver input, which is at a logic high. The second bootstrap capacitor is charged by an additional diode or diode-connected FET connected to the supply voltage when the inverting driver input is a logic low.