H01L23/5328

Semiconductor package with core substrate having a through hole

A semiconductor package includes a frame having a through hole, an electronic component disposed in the through hole, a metal layer disposed on either one or both of an inner surface of the frame and an upper surface of the electronic component, a redistribution portion disposed below the frame and the electronic component, and a conductive layer connected to the metal layer.

Semiconductor structure with two-dimensional conductive structures

A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure comprises at least one two-dimensional (2D) conductive structure; a dielectric layer disposed on the 2D conductive structure; and at least one interconnect structure disposed in the dielectric layer and extending into the 2D conductive structure, wherein the interconnect structure laterally connects to at least one edge of the 2D conductive structure.

ELECTRONIC DEVICE AND VARIABLE FREQUENCY CONTROL SYSTEM USING ELECTRONIC DEVICE
20240274546 · 2024-08-15 ·

An electronic device and a variable frequency control system using the electronic device. The electronic device may comprise: a shielding layer, which is inserted between a current outflow terminal of a switching device and a grounding conductor; and a conductive elastomer, which is used for connecting the current outflow terminal to the shielding layer.

Flexible device having flexible interconnect layer using two-dimensional materials

A flexible device includes an electronic device having an electrode and a flexible interconnect layer formed on the electrode. The flexible interconnect layer includes a two-dimensional (2D) material and a conductive polymer to have high electric conductivity and flexibility. The flexible device includes a flexible interconnect layer of one or more layers, and in this case, includes a low-dielectric constant dielectric layer between the respective layers.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor device includes a non-insulator structure, at least one carbon nano-tube (CNT), a dielectric layer, and a graphene-based conductive layer. The CNT is over the non-insulator structure. The dielectric layer surrounds the CNT. The graphene-based conductive layer is over the at least one CNT. The CNTs and the graphene-based conductive layer have low resistance.

CHIP-SIZE, DOUBLE SIDE CONNECTION PACKAGE AND METHOD FOR MANUFACTURING THE SAME
20180269141 · 2018-09-20 ·

A low resistance metal is charged into holes formed in a semiconductor substrate to thereby form through electrodes. Post electrodes of a wiring-added post electrode component connected together by a support portion thereof are simultaneously fixed to and electrically connected to connection regions formed on an LSI chip. On the front face side, after resin sealing, the support portion is separated so as to expose front face wiring traces. On the back face side, the semiconductor substrate is grounded so as to expose tip ends of the through electrodes. The front face wiring traces exposed to the front face side and the tip ends of the through electrodes exposed to the back face side are used as wiring for external connection.

Reactively Assisted Ink for Printed Electronic Circuits
20180251652 · 2018-09-06 ·

An ink contains particles containing metal that reacts during sintering to produce an electrically conductive line or area having a diffusivity that is less than the diffusivity of the metal before the reaction. Resulting electronic circuits therefore exhibit longer useful lives, compared to conventionally inkjet printed circuits.

Formation of solder and copper interconnect structures and associated techniques and configurations
10068863 · 2018-09-04 · ·

Embodiments of the present disclosure are directed toward formation of solder and copper interconnect structures and associated techniques and configurations. In one embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a solderable material on the IC substrate using an ink deposition process, a binder printing system, or a powder laser sintering system. In another embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure. Other embodiments may be described and/or claimed.

CONDUCTIVE PATTERN, ELECTRIC CIRCUIT, ELECTROMAGNETIC WAVE SHIELD, AND METHOD FOR PRODUCING CONDUCTIVE PATTERN
20180206368 · 2018-07-19 ·

An object to be achieved by the present invention is to provide a conductive pattern having such a level of adhesion that a conductive layer containing a conductive substance such as silver does not separate from a primer layer with time. The present invention relates to a conductive pattern including a conductive layer (A) containing a compound (a1) having a basic nitrogen atom-containing group and a conductive substance (a2); a primer layer (B) containing a compound (b1) having a functional group [X]; and a substrate layer (C), the conductive layer (A), the primer layer (B), and the substrate layer (C) being stacked, in which a bond is formed by reacting the basic nitrogen atom-containing group of the compound (a1) contained in the conductive layer (A) with the functional group [X] of the compound (b1) contained in the primer layer (B).

Reactively Assisted Ink for Printed Electronic Circuits
20180163071 · 2018-06-14 ·

An ink contains particles containing metal that reacts during sintering to produce an electrically conductive line or area having a diffusivity that is less than the diffusivity of the metal before the reaction. Resulting electronic circuits therefore exhibit longer useful lives, compared to conventionally inkjet printed circuits.