A driving backplane includes: a base; a first conductive layer disposed on the base, the first conductive layer including at least one first signal line; a first insulating layer disposed on a side of the first conductive layer away from the base; a second conductive layer disposed on a side of the first insulating layer away from the first conductive layer, the second conductive layer including at least one second signal line. Each first signal line and a second signal line constitute a signal line pair. In the signal line pair, extending directions of the first signal line and the second signal line are the same, an orthogonal projection of the first signal line on the base and an orthogonal projection of the second signal line on the base have a first overlapping region, and the second signal line is coupled to the first signal line.

An array substrate, a display panel, and an electronic device are provided. The array substrate includes: a base substrate; a first electrode arranged on the base substrate; a gate line arranged on the base substrate, wherein the gate line is electrically insulated from the first electrode; a second electrode arranged on a side of the gate line away from the base substrate, wherein at least one first sub-pixel unit provided on the base substrate includes: a first connection portion arranged in a same layer as the second electrode and a second connection portion arranged in a same layer as the gate line, wherein the second connection portion is electrically connected to the first electrode, and an orthographic projection of the second connection portion on the base substrate at least partially overlaps an orthographic projection of the first connection portion on the base substrate.

A display panel includes a driving circuit and a signal line. The signal line includes at least two main signal sub-lines each including a first end and a second end, the first ends of the at least two main signal sub-lines are electrically coupled to each other, and the second ends thereof are electrically coupled to each other. N main signal sub-lines in the at least two main signal sub-lines are directly electrically coupled to the driving circuit. Each of the N main signal sub-lines is a direct-coupled main signal sub-line, and a main signal sub-line in the at least two main signal sub-lines other than the direct-coupled main signal sub-lines is an indirect-coupled main signal sub-line which is not directly electrically coupled to the driving circuit but electrically coupled to the driving circuit via the direct-coupled main signal sub-line, where N is a positive integer.

Disclosed are an array substrate and a display device. The array substrate includes: a plurality of sub-pixel elements in an array, wherein each row of sub-pixel elements includes a common electrode; the common electrode includes a plurality of sub-common electrodes, each of which corresponds to one of the sub-pixel elements; the sub-common electrode includes a body connection section, a plurality of comb teeth connected with the body connection section, and a shielding section connected with the body connection section, wherein the first comb teeth and the shielding section are on the same side of the body connection section, and the shielding section is on the outermost side of the first comb teeth; and the body connection sections of two adjacent sub-common electrodes in the common electrode are on two opposite sides. The body connection sections of two adjacent sub-common electrodes in each common electrode are arranged on two opposite sides.

The present disclosure relates to a display device including a substrate, a gate line on the substrate, a data line crossing the gate line, a pixel connected to the gate line and the data line, and a dummy data line disposed at an edge on the substrate and crossing the gate line, wherein the dummy data line includes openings that is disposed on a portion that is near an overlapping portion with the gate line, and portions of the dummy data line separated by the openings are electrically insulated from each other.

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a substrate; a thin film transistor layer including a gate electrode, a source electrode, and a drain electrode; and a first anti-reflective layer disposed between the substrate and the thin film transistor layer and disposed corresponding to at least one of the gate electrode, the source electrode, or the drain electrode. Wherein, the first anti-reflective layer includes a peeling prevention layer and an anti-reflective functional layer. The anti-reflective functional layer is disposed on a side of the peeling prevention layer away from the substrate.

An array substrate, a manufacturing method thereof, and a display panel are provided. By disposing first electrodes and second electrodes on top and bottom sides of an active layer, respectively, and disposing a part of each gate electrode among sub-active patterns, the array substrate is formed with vertical-structured thin film transistors. Therefore, a channel resistance can be reduced, and a channel width of the thin film transistors can be reduced, thereby reducing an area of the thin film transistors, reducing impedance of the thin film transistors, and reducing power consumption of the display panel.

An array substrate manufacturing method includes forming a plurality of first lead lines, a plurality of pixel electrodes, and a plurality of connecting lines over a substrate. Each first lead line is insulated from any pixel electrode, and each connecting line is insulated from any first lead line and is configured to electrically couple at least two pixel electrodes such that a set of pixel electrodes electrically coupled by each set of connecting lines substantially form an equivalent lead line. The method further includes detecting whether there is a short circuit between one equivalent lead line and a first lead line, and severing each of the plurality of connecting lines such that any two of the plurality of pixel electrodes are not electrically coupled.

The present application relates to the field of display technology and, in particular, to an array substrate, a manufacturing method of the array substrate, and a display device. An array substrate comprises: a base substrate having a pixel display area and a gate drive circuit area; a first thin film transistor formed in the pixel display area, the first thin film transistor comprising a first gate insulating layer; a second thin film transistor formed in the gate drive circuit area, the second thin film transistor comprising a second gate insulating layer, where a thickness of the second gate insulating layer is smaller than a thickness of the first gate insulating layer.

A display device includes a first data line extending in a first direction, arranged in a display area, and connected to a first display element; a second data line extending in the first direction, arranged in the display area, and connected to a second display element; an auxiliary line arranged in a first non-display area and connecting the first data line to the second data line; and a plurality of patterns arranged apart from the auxiliary line in surroundings of the auxiliary line in the first non-display area.