H01L2224/40105

Semiconductor device

In semiconductor device, a substrate unit includes an insulating substrate, a first conductor substrate and a second conductor substrate which are disposed on one main surface of the insulating substrate and spaced apart from each other, and a third conductor substrate which is disposed on the other main surface opposite to the one main surface of the insulating substrate. A terminal is connected to a surface of a semiconductor element opposite to the first conductor substrate. The terminal extends from a region above the semiconductor element to a region above the second conductor substrate while being connected to the second conductor substrate. At least a part of the terminal, the substrate unit and the semiconductor element is sealed by a resin. The third conductor substrate is exposed from the resin.

Integrated circuit chip packaging including a heat sink topped cavity

An electrical circuit device includes a circuit board including a cavity extending from a top surface of the circuit board to an embedded conductor, an integrated circuit chip in the cavity, an electrical connection between the integrated circuit chip and the embedded conductor, a thermal slug disposed over a top surface of the integrated circuit chip, and a heat sink mounted to an outer surface of the thermal slug for transferring a thermal energy away from the circuit board, the heat sink extending above a top surface of the circuit board.

SIDERAIL WITH MOLD COMPOUND RELIEF

A method of manufacturing a semiconductor package includes attaching semiconductor dies to an array of leadframes and positioning a clip array in alignment with the array of leadframes within a mold cavity, the clip array including clips that electrically connect to at least some of the semiconductor dies and a siderail along a perimeter of the clip array. The siderail forms a set of reliefs extending from an outer edge of the siderail to an inner edge of the siderail, the inner edge being adjacent to the array of leadframes. The method also includes injecting a mold compound into the mold cavity through a flow path including the set of reliefs of the siderail to form a mold block at least partially covering the semiconductor dies.

INTEGRATED CIRCUIT CHIP PACKAGING
20200168524 · 2020-05-28 ·

A method of mounting an integrated circuit chip to a circuit board includes placing the integrated circuit chip into a cavity extending from a surface of the circuit board to an embedded conductor, electrically connecting the integrated circuit chip to the embedded conductor, and disposing a heat sink over a surface of the integrated circuit chip. The electrically connecting the integrated circuit chip to the embedded conductor includes flip chip mounting of the integrated circuit chip within the cavity.

INTEGRATED CIRCUIT CHIP PACKAGING
20200168525 · 2020-05-28 ·

A method of mounting an integrated circuit chip to a circuit board includes placing the integrated circuit chip into a cavity extending from a surface of the circuit hoard to an embedded conductor, electrically connecting the integrated circuit chip to the embedded conductor, and disposing a heat sink over a surface of the integrated circuit chip.

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

An embodiment related to a method for forming a device is disclosed. The method includes providing a package substrate having a first die attach pad (DAP) and a first bond pad, forming a first conductive die-substrate bonding layer on the first DAP, and attaching a first major surface of a first die to the first DAP. The first die includes a first die contact pad on a second major surface of the first die. A first conductive clip-die bonding layer with spacers is formed on the first die contact pad of the first die. A first conductive clip-substrate bonding layer is formed on the first bond pad of the package substrate. The method also includes attaching a first clip bond to the first die and the first bond pad. The first clip bond includes a first horizontal planar portion attached to the first die over the first die contact pad and a second vertical portion attached to the first bond pad.

Multi-Clip Structure for Die Bonding
20200105707 · 2020-04-02 ·

A multi-clip structure includes a first clip for die bonding and a second clip for die bonding. The multi-clip structure further includes a retaining tape fixed to the first clip and to the second clip to hold the first clip and the second clip together.

Integrated circuit chip packaging

A method of mounting an integrated circuit chip to a circuit board includes placing the integrated circuit chip into a cavity extending from a surface of the circuit board to an embedded conductor, and electrically connecting the integrated circuit chip to the embedded conductor.

Electronic device

An electronic device has a substrate 5, a first electric element 91 provided on a first conductor layer 71, a second electric element 92 provided on the first electric element 91, and a connector 50 having a base end part 45 provided on a second conductor layer 72 and a head part 40 provided on a front surface electrode 92a of the second electric element 92 via a conductive adhesive 75. An area of the base end part 45 placed on the second conductor layer 72 is larger than an area of the head part 40 placed on the second electric element 92. The base end part 45 is located at a side of the substrate 5 compared with the head part 40, and a gravity center position of the connector 50 is at a side of the base end part 45 of the connector 50.

Semiconductor module with temperature detecting element

In a semiconductor module, first and second semiconductor chips each include a transistor and a temperature-detecting diode connected between first and second control pads. The first control pad of the first semiconductor chip is connected to a first control terminal, the second control pad of the first semiconductor chip and the first control pad of the second semiconductor chip are connected to a second control terminal, and the second control pad of the second semiconductor chip is connected to a third control terminal.