Patent classifications
H01L2224/83868
Method for bonding substrates
A method for bonding a first substrate with a second substrate by means of a connecting layer that is arranged between the substrates and that is comprised of a connecting material with the following steps: applying the connecting material to the first substrate and/or the second substrate in liquid form, and distributing the connecting material between the substrates by bringing the substrates closer and as a result forming the shape of the connecting layer with a thickness t.
WAFER LEVEL INTEGRATION INCLUDING DESIGN/CO-DESIGN, STRUCTURE PROCESS, EQUIPMENT STRESS MANAGEMENT AND THERMAL MANAGEMENT
A multi-layer wafer and method of manufacturing such wafer are provided. The method comprises applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers and low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers to form a multi-layer wafer pair. The multi-layer wafer comprises two heterogeneous wafers, at least one of the heterogeneous wafers having a stress compensating polymer layer. The two heterogeneous wafers are low temperature bonded together to bond the stress compensating polymer layer to the other of the two heterogeneous wafers.
WAFER LEVEL INTEGRATION INCLUDING DESIGN/CO-DESIGN, STRUCTURE PROCESS, EQUIPMENT STRESS MANAGEMENT AND THERMAL MANAGEMENT
A multi-layer wafer and method of manufacturing such wafer are provided. The method comprises creating under bump metallization (UMB) pads on each of the two heterogeneous wafers; applying a conductive means above the UMB pads on at least one of the two heterogeneous wafers; and low temperature bonding the two heterogeneous wafers to adhere the UMB pads together via the conductive means. At least one stress compensating polymer layer may be applied to at least one of two heterogeneous wafers. The multi-layer wafer comprises two heterogeneous wafers, each of the heterogeneous wafer having UMB pads and at least one of the heterogeneous wafers having a stress compensating polymer layer and a conductive means applied above the UMB pads on at least one of the two heterogeneous wafers. The two heterogeneous wafers low temperature bonded together to adhere the UMB pads together via the conductive means.
BONDED ASSEMBLY AND DISPLAY DEVICE INCLUDING THE SAME
A bonded assembly including: a first electronic component including a first substrate and a plurality of first electrodes disposed in a pressed area at a first height from a surface of the first substrate; a second electronic component including a second substrate and a plurality of second electrodes disposed at a second height from a surface of the second substrate, a second electrode overlapping with a corresponding first electrode to face the first electrode; a conductive bonding layer disposed between the first electrode and the second electrode overlapped with each other to bond the first electrode and the second electrode; and at least one spacer disposed between the first substrate and the second substrate to overlap the pressed area, the at least one spacer having a thickness that is greater than a value obtained by summing the first height and the second height.
BONDED ASSEMBLY AND DISPLAY DEVICE INCLUDING THE SAME
A bonded assembly including: a first electronic component including a first substrate and a plurality of first electrodes disposed in a pressed area at a first height from a surface of the first substrate; a second electronic component including a second substrate and a plurality of second electrodes disposed at a second height from a surface of the second substrate, a second electrode overlapping with a corresponding first electrode to face the first electrode; a conductive bonding layer disposed between the first electrode and the second electrode overlapped with each other to bond the first electrode and the second electrode; and at least one spacer disposed between the first substrate and the second substrate to overlap the pressed area, the at least one spacer having a thickness that is greater than a value obtained by summing the first height and the second height.
METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
A method includes followings operations. A substrate including a first surface and a second surface is provided. The substrate and a transparent film are heated to attach the transparent film on the first surface. A first coefficient of a thermal expansion (CTE) mismatch is between the substrate and the transparent film. The substrate and the transparent film are cooled. A polymeric material is disposed on the second surface. A second CTE mismatch is between the substrate and the polymeric material. The second CTE mismatch is counteracted by the first CTE mismatch.
Printed Assemblies of Ultrathin, Microscale Inorganic Light Emitting Diodes for Deformable and Semitransparent Displays
Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.
Tape chip on lead using paste die attach material
According to various embodiments, systems and methods for packaging a semiconductor device are provided. The disclosure discusses a semiconductor die having a top side and a bottom side that is disposed on a lead frame. An adhesive paste is then applied to attach the semiconductor die to the lead frame such that the adhesive paste fixes the die to a portion of the lead frame. The adhesive paste may be applied directly between die and the lead frame or may be applied in conjunction with a frame tape.
Tape chip on lead using paste die attach material
According to various embodiments, systems and methods for packaging a semiconductor device are provided. The disclosure discusses a semiconductor die having a top side and a bottom side that is disposed on a lead frame. An adhesive paste is then applied to attach the semiconductor die to the lead frame such that the adhesive paste fixes the die to a portion of the lead frame. The adhesive paste may be applied directly between die and the lead frame or may be applied in conjunction with a frame tape.
IMPROVED ADHESIVE BONDING COMPOSITION AND METHOD OF USE
A method of and system for adhesive bonding. The method and system a) treat a surface of an element to be bonded to provide an adherent structure including one or more rubber compounds on the surface; b) place a polymerizable adhesive composition, including at least one photoinitiator and at least one energy converting material, in contact with the adherent structure and two or more components to be bonded to form an assembly, c) irradiated the assembly with radiation at a first wavelength, capable of conversion by the at least one energy converting material, to a second wavelength capable of activating the at least one photoinitiator to produce from the polymerizable adhesive composition a cured adhesive composition; and d) adhesively join the two or more components by way of the adherent structure and the cured adhesive composition.