H01L21/31058

METHOD FOR FORMING ORGANIC FILM AND METHOD FOR MANUFACTURING SUBSTRATE FOR SEMICONDUCTOR APPARATUS
20170309493 · 2017-10-26 · ·

The present invention provides a method for forming an organic film, including: forming a coating film by spin coating of an organic film-forming composition onto a substrate having an uneven pattern, and thereafter subjecting the substrate to a vibration treatment, and after or simultaneously with the vibration treatment, insolubilizing the coating film to an organic solvent to form the organic film. This provides a method for forming an organic film that can fill an uneven pattern on a substrate to highly flatten a substrate at low cost in a production step of a semiconductor apparatus, etc.

BLOCK COPOLYMER

The present application relates to a block copolymer and its use. The present application can provides a block copolymer that has an excellent self assembling property or phase separation property and therefore can be used in various applications and its use.

BLOCK COPOLYMER

The present application relates to a block copolymer and uses thereof. The present application can provide a block copolymer—which exhibits an excellent self-assembling property and thus can be used effectively in a variety of applications—and uses thereof.

Method for forming semiconductor device structure with gate

A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.

Interconnect integration for sidewall pore seal and via cleanliness

A method for sealing porous low-k dielectric films is provided. The method comprises exposing a substrate to UV radiation and a first reactive gas, wherein the substrate has an open feature defined therein, the open feature defined by a porous low-k dielectric layer and a conductive material, wherein the porous low-k dielectric layer is a silicon and carbon containing material and selectively forming a pore sealing layer in the open feature on exposed surfaces of the porous low-k dielectric layer using UV assisted photochemical vapor deposition.

Method for Manufacturing Pillar or Hole Structures in a Layer of a Semiconductor Device, and Associated Semiconductor Structure

The present disclosure relates to a method for manufacturing pillar or hole structures in a layer of semiconductor device, and associated semiconductor structure. At least one embodiment relates to a method for manufacturing pillar structures in a layer of a semiconductor device. The pillar structures are arranged at positions forming a hexagonal matrix configuration. The method includes embedding alignment pillar structures in a backfill brush polymer layer. The method also includes providing a BCP layer on a substantially planar surface defined by an upper surface of the alignment pillar structures and the backfill brush polymer layer. Further, the method includes inducing polymer microphase separation of the BCP polymer layer into pillar structures of a first component of the BCP polymer layer embedded in a second component of the BCP polymer layer.

SELECTIVE SELF-ALIGNED PATTERNING OF SILICON GERMANIUM, GERMANIUM AND TYPE III/V MATERIALS USING A SULFUR-CONTAINING MASK
20170287724 · 2017-10-05 ·

A method for patterning a substrate including multiple layers using a sulfur-based mask includes providing a substrate including a first layer and a second layer arranged on the first layer. The first layer includes a material selected from a group consisting of germanium, silicon germanium and type III/V materials. The method includes depositing a mask layer including sulfur species on sidewalls of the first layer and the second layer by exposing the substrate to a first wet chemistry. The method includes removing the mask layer on the sidewalls of the second layer while not completely removing the mask layer on the sidewalls of the first layer by exposing the substrate to a second wet chemistry. The method includes selectively etching the second layer relative to the first layer and the mask layer on the sidewalls of the first layer by exposing the substrate to a third wet chemistry.

POLYMER MATERIAL, COMPOSITION, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

According to one embodiment, a polymer material is disclosed. The polymer material contains a polymer. The polymer contains a first monomer unit having a lone pair and an aromatic ring at a side chain, and a second monomer unit including a crosslinking group at a terminal of the side chain, with its molar ratio of 0.5 mol % to 10 mol % to all monomer units in the polymer. The polymer material can be used for manufacturing a composite film as a mask pattern for processing a target film on a substrate. The composite film can be formed by a process including, forming an organic film on the target film with the polymer material, patterning the organic film, and forming the composite film by impregnating a metal compound into the patterned organic film.

Semiconductor device, method for manufacturing the same, and rinsing liquid

A method for manufacturing a semiconductor device including: a process of applying a sealing composition for a semiconductor to a semiconductor substrate, to form a sealing layer for a semiconductor on at least the bottom face and the side face of a recess portion of an interlayer insulating layer, the sealing composition including a polymer having a cationic functional group and a weight average molecular weight of from 2,000 to 1,000,000, each of the content of sodium and the content of potassium in the sealing composition being 10 ppb by mass or less on an elemental basis; and a process of subjecting a surface of the semiconductor substrate at a side at which the sealing layer has been formed to heat treatment of from 200° C. to 425° C., to remove at least a part of the sealing layer.

BLOCK COPOLYMER

The present application relates to a block copolymer and uses thereof. The present application can provide a block copolymer—which exhibits an excellent self-assembling property and thus can be used effectively in a variety of applications—and uses thereof.