Device-level interconnects having high thermal stability for stacked device structures are disclosed herein. An exemplary stacked semiconductor structure includes an upper source/drain contact disposed on an upper epitaxial source/drain, a lower source/drain contact disposed on a lower epitaxial source/drain, and a source/drain via connected to the upper source/drain contact and the lower source/drain contact. The source/drain via is disposed on the upper source/drain contact, the source/drain via extends below the upper source/drain contact, and the source/drain via includes ruthenium and aluminum. In some embodiments, the source/drain via includes a ruthenium plug wrapped by an aluminum liner. In some embodiments, the source/drain via includes a ruthenium aluminide plug. In some embodiments, the source/drain via includes a ruthenium plug wrapped by a ruthenium aluminide liner. In some embodiments, the source/drain via extends below a top of the lower epitaxial source/drain.

Technologies for air gaps in semiconductor dies with aluminum oxide liners are disclosed. In an illustrative embodiment, high-aspect-ratio traces on an interconnect layer of a semiconductor die have a relatively narrow pitch. In order to reduce the capacitance between neighboring traces, an air gap is present. A liner above the air gap prevents the air gap from being filled during the semiconductor processing. In an illustrative embodiment, the liner is aluminum oxide, which may prevent stress induced leakage current (SILC) that may result when using silicon oxide or other materials.