According to one embodiment, a semiconductor device includes a semiconductor chip, and a die pad. The die pad has a first surface. The semiconductor chip is bonded on the first surface using a paste including a metal particle. A concave structure is provided in the first surface. The concave structure is positioned directly under each of a plurality of sides of the semiconductor chip and extends along each of the plurality of sides.

A method of manufacturing a semiconductor device structure includes forming a bond or joint between a first device and a second device. The first device comprises an integrated passive device (IPD) and a first contact pad disposed over the IPD. The second device comprises a second contact pad. The first contact pad has a first surface with first lateral extents. The second contact pad has a second surface with second lateral extents. The width of the second lateral extents is less than the width of the first lateral extents. The joint structure includes the first contact pad, the second contact pad, and a solder layer interposed therebetween. The solder layer has tapered sidewalls extending in a direction away from the first surface of the first contact pad to the second surface of the second contact pad. At least one of the first surface or the second surface is substantially planar.

A chip structure includes a first substrate, a second substrate, a conductive via, and a redistribution layer. The first substrate has a first inclined sidewall. The second substrate is located on a bottom surface of the first substrate, and has an upper portion and a lower portion. The lower portion extends from the upper portion. The upper portion is between the first substrate and the lower portion. The upper portion has a second inclined sidewall, and a slope of the first inclined sidewall is substantially equal to a slope of the second inclined sidewall. The conductive via is in the lower portion. The redistribution layer extends from a top surface of the first substrate to a top surface of the lower portion of the second substrate sequentially along the first inclined sidewall and the second inclined sidewall, and is electrically connected to the conductive via.

A semiconductor device has a bonding pad and a wiring layer formed on an insulating film. The wiring layer is spaced from the bonding pad by a gap. A passivation film covers the bonding pad and the wiring layer and fills the gap. The gap has a width equal to or larger than the thickness of the passivation film, and equal to or smaller than twice a side wall thickness of the passivation film covering a side wall of the wiring layer. The semiconductor device has a high resistance to stress during bonding.

A method for soldering a surface-mount component onto a circuit board. The melting of die-bonding solder material is prevented by using a mounting solder material when soldering a surface-mount component formed using the die-bonding solder material onto a printed circuit board. The surface-mount component, formed using (SnSb)-based solder material having high melting point, the (SnSb)-based solder material containing Cu but not more than a predetermined quantity of Cu constituent and a main ingredient thereof being Sn, is soldered on a board terminal portion of a circuit board using (SnAgCuBi)-based solder material or (SnAgCuBiIn)-based solder material as the mounting solder material and with the solder material being applied on the terminal portion. Since solidus temperature of the die-bonding solder material is 243 degrees C. and liquidus temperature of the mounting solder material is about 215 through 220 degrees C., the melting of die-bonding solder material is prevented even at the heating temperature (240 degrees C. or less) of a reflow furnace.

A method of manufacturing a semiconductor device structure includes forming a bond or joint between a first device and a second device. The first device comprises an integrated passive device (IPD) and a first contact pad disposed over the IPD. The second device comprises a second contact pad. The first contact pad has a first surface with first lateral extents. The second contact pad has a second surface with second lateral extents. The width of the second lateral extents is less than the width of the first lateral extents. The joint structure includes the first contact pad, the second contact pad, and a solder layer interposed therebetween. The solder layer has tapered sidewalls extending in a direction away from the first surface of the first contact pad to the second surface of the second contact pad. At least one of the first surface or the second surface is substantially planar.

An electrical device includes a substrate, an insulating layer supported by the substrate, and an electrically conductive vertical interconnect disposed in a via hole of the insulating layer. The insulating layer may be configured to provide a coefficient of thermal expansion (CTE) that is equal to or greater than a CTE of the vertical interconnect to thereby impart axial compressive forces at opposite ends of the interconnect. The vertical interconnect may be a hybrid interconnect structure including a low CTE conductor post having a pocket that contains a high CTE conductor contact. At low operating temperatures, the high CTE conductor contact is under tension due to the higher CTE, and thus the high CTE conductor contact relieves strain in the device by void expansion and elongation.

The melting of die-bonding solder material is prevented even when soldering a surface-mount component formed using the die-bonding solder material on a printed circuit board using a mounting solder material. The surface-mount component formed using (SnSb)-based solder material having high melting point as the solder material for die pad, the (SnSb)-based solder material containing Cu not more than a predetermined quantity of Cu constituent and a main ingredient thereof being Sn, is soldered on a board terminal portion of a circuit board using (SnAgCuBi)-based solder material as the mounting solder material with the solder material being applied on the terminal portion. The melting of die-bonding solder material is prevented even at the heating temperature (240 degrees C. or less) of a reflow furnace.

At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device package. The substrate comprises a dielectric layer, a first conductive element adjacent to the dielectric layer, a second conductive element adjacent to the dielectric layer, and a third conductive element adjacent to the dielectric layer. The first conductive element has a first central axis in a first direction and a second central axis in a second direction. The first conductive element comprises a first chamfer and a second chamfer adjacent to the first chamfer. The second conductive element has a first central axis in the first direction and a second central axis in the second direction. The third conductive element has a first central axis in the first direction and a second central axis in the second direction. The first central axes of the first, second, and third conductive elements are substantially parallel to one another in the first direction and are misaligned from one another. The second central axes of the first and second conductive elements are substantially co-linear in the second direction. The second central axis of the third conductive element is substantially parallel to and misaligned from the second central axes of the first and second conductive elements. The first chamfer and the second chamfer are separated by at least one of the first central axis and the second central axis of the first conductive element and are substantially asymmetric.

An active substrate includes a plurality of active components distributed over a surface of a destination substrate, each active component including a component substrate different from the destination substrate, and each active component having a circuit and connection posts on a process side of the component substrate. The connection posts may have a height that is greater than a base width thereof, and may be in electrical contact with the circuit and destination substrate contacts. The connection posts may extend through the surface of the destination substrate contacts into the destination substrate connection pads to electrically connect the connection posts to the destination substrate contacts.