The invention relates to a metal layer stack for use in electronic components, in particular as a spacer in power electronic components, comprising n bulk metal layers and n or n+1 contact material layers, wherein the bulk metal layers and the contact material layers are stacked in an alternating manner and n is at least two. Additionally, the invention relates to a process for preparing the metal layer stack and a semiconductor module comprising such a metal layer stack.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A die and substrate assembly is disclosed for a die with electronic circuitry and a substrate. A sintered bonding layer of sintered metal is disposed between the die and the substrate. The sintered bonding layer includes a plurality of zones having different sintered metal densities. The plurality of zones are distributed along one or more horizontal axes of the sintered bonding layer, along one or more vertical axes of the sintered bonding layer or along both one or more horizontal and one or more vertical axes of the sintered bonding layer.

A semiconductor chip includes a semiconductor body and a chip metallization applied on the semiconductor body. The chip metallization has an underside facing away from the semiconductor body. The chip further includes a layer stack applied to the underside of the chip metallization and having a number N1≧1 or N1≧2 of first partial layers and a number N2≧2 of second partial layers. The first partial layers and the second partial layers are arranged alternately and successively such that at least one of the second partial layers is arranged between the first partial layers of each first pair of the first partial layers and such that at least one of the first partial layers is arranged between the second partial layers of each second pair of the second partial layers.

A method for the production of a silver sintering agent in the form of a layer-shaped silver sintering body having silver oxide surfaces and the use thereof are provided.

A second semiconductor switching element is connected in series with a first semiconductor switching element, and is at least partially stacked on the first semiconductor switching element in the thickness direction. A first control element controls the first semiconductor switching element and the second semiconductor switching element, and performs an overcurrent protection operation with reference to a shunt voltage. The first control element is arranged outside the first semiconductor switching element and the second semiconductor switching element in the in-plane direction.

There is provided an imaging device, an electronic apparatus including an imaging device, and an automotive vehicle including an electronic apparatus including an imaging device, including: a first substrate including a first set of photoelectric conversion units; a second substrate including a second set of photoelectric conversion units; and an insulating layer between the first substrate and the second substrate; where the insulating layer has a capability to reflect a first wavelength range of light and transmit a second wavelength range of light that is longer than the first wavelength range of light.

A silver-indium transient liquid phase method of bonding a semiconductor device and a heat-spreading mount, and a semiconductor structure having a silver-indium transient liquid phase bonding joint are provided. With the ultra-thin silver-indium transient liquid phase bonding joint formed between the semiconductor device and the heat-spreading mount, its thermal resistance can be minimized to achieve a high thermal conductivity. Therefore, the heat spreading capability of the heat-spreading mount can be fully realized, leading to an optimal performance of the high power electronics and photonics devices.

Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.

A second semiconductor switching element is connected in series with a first semiconductor switching element, and is at least partially stacked on the first semiconductor switching element in the thickness direction. A first control element controls the first semiconductor switching element and the second semiconductor switching element, and performs an overcurrent protection operation with reference to a shunt voltage. The first control element is arranged outside the first semiconductor switching element and the second semiconductor switching element in the in-plane direction.