Patent classifications
H01L2224/48471
Integrated circuit package structure with conductive stair structure and method of manufacturing thereof
An integrated circuit package structure includes a circuit board, an integrated circuit die and a conductive stair structure. The circuit has an upper surface. The integrated circuit die is located on the upper surface of the circuit board. The conductive stair structure is located on the upper surface of the circuit board. The conductive stair structure includes steps along a first direction substantially perpendicular to the upper surface of the circuit board. The steps have different heights relative to the upper surface of the circuit board.
Semiconductor die and package jigsaw submount
A submount for connecting a semiconductor device to an external circuit, the submount comprising: a planar substrate formed from an insulating material and having relatively narrow edge surfaces and first and second relatively large face surfaces; at least one recess formed along an edge surface; a layer of a conducting material formed on a surface of each of the at least one recess; a first plurality of soldering pads on the first face surface configured to make electrical contact with a semiconductor device; and electrically conducting connections each of which electrically connects a soldering pad in the first plurality of soldering pads to the layer of conducting material of a recess of the at least one recess.
Circuit board, electronic component and method of manufacturing circuit board
Disclosed is a circuit board having a contact pad for connection with an external device, which protrudes from an upper surface of an outermost insulating layer. A device can be mounted on the circuit board, and a connection terminal of the device can be connected to the contact pad of the circuit board by a wire etc.
Electronic Package and Electronic Device Comprising the Same
Example embodiments relate to electronic packages and electronic devices that include the same. One embodiment includes an electronic package. The electronic package includes a package body. The electronic package also includes a heat-conducting substrate arranged inside the package body and having a bottom surface that is exposed to an outside of the package body. Additionally, the electronic package includes an electronic circuit arranged inside the package body and including a semiconductor die that has a bottom surface with which it is mounted to the heat-conducting substrate and an opposing upper surface. Further, the electronic package includes one or more leads partially extending from outside the package body to inside the package body and over the minimum bounding box, each lead having a first end that is arranged inside the package body. In addition, the electronic package includes one or more bondwires for connecting the first end(s) to the electronic circuit.
Support terminal integral with die pad in semiconductor package
A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.
LED package structure
A light-emitting diode (LED) package structure includes a substrate, an LED, a side wall, an encapsulant, and a waterproof protective coating. The LED is disposed on the substrate, the side wall defines a through hole and is disposed on the substrate, and the LED is accommodated in the through hole. The encapsulant is filled in the through hole and covers the LED. A heterojunction is disposed between the encapsulant and the side wall, and the waterproof protective coating seals the heterojunction. Furthermore, the encapsulant includes a first fluoropolymer, the waterproof protective coating includes a second fluoropolymer, and the light transmittance of the first fluoropolymer is greater than that of the second fluoropolymer.
SEMICONDUCTOR DEVICE
A semiconductor device includes a base member, a wiring portion, a semiconductor element, and a resin package. The base member has an obverse surface, a reverse surface, and a side surface connecting the obverse surface and the reverse surface. The semiconductor element is electrically connected to the wiring portion and arranged on the obverse surface of the base member. The resin package covers the semiconductor element. The wiring portion includes an obverse-surface portion formed on the obverse surface, a reverse-surface portion formed on the reverse surface, and a through portion connecting the obverse-surface portion and the reverse-surface portion. The through portion has an exposed surface exposed from the side surface of the base member and a larger portion. The larger portion is positioned more inward than the exposed surface as viewed in the thickness direction of the base member. The larger portion has a dimension larger than the exposed surface in a first direction that is perpendicular to the thickness direction and parallel to the exposed surface.
Air venting on proximity sensor
One or more embodiments are directed to system in package (SiP) for optical devices, including proximity sensor packaging. One embodiment is directed to an optical sensor that includes a substrate and a sensor die. A through-hole extends through the substrate, and a trench is formed in a first surface of the substrate and is in fluid communication with the through-hole. The sensor die is attached to the first surface of the substrate and covers the first through-hole and a first portion of the trench. A second portion of the trench is left uncovered by the sensor die.
Semiconductor device
A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.