Patent classifications
H03M13/114
METHOD AND APPARATUS FOR DATA PROCESSING WITH STRUCTURED LDPC CODES
The embodiments of the present disclosure provide a method and an apparatus for data processing with structured LDPC codes. The method includes: obtaining a code block size for structured LDPC coding; determining a coding expansion factor z based on at least one of the code block size, a parameter kb of a basic check matrix, a positive integer value p or the basic check matrix having mb rows and nb columns; and encoding a data sequence to be encoded, or decoding a data sequence to be decoded, based on the basic check matrix and the coding expansion factor. The present disclosure is capable of solving the problem in the related art associated with low flexibility in data processing with LDPC coding and improving the flexibility in data processing with LDPC coding.
OFFSET VALUE DETERMINATION IN A CHECK NODE PROCESSING UNIT FOR MESSAGE-PASSING DECODING OF NON-BINARY CODES
Embodiments of the invention provide an elementary check node processing unit (300) implemented in a check node processing unit of a non-binary error correcting code decoder, the elementary check node processing unit (300) being linked to a variable node processing unit (305) and being configured to receive a first message and a second message, each message comprising at least two components. The elementary check node processing unit (300) comprises a calculation unit (301) which determines two or more auxiliary components from the components comprised in the first message and from the components comprised in the second message, an auxiliary component comprising an auxiliary reliability metrics. The calculation unit (301) also determines, in association with each of the two or more auxiliary components, decoding performance values. The elementary check node processing unit (300) also comprises a selection unit (303) which selects, among the two or more auxiliary components, the auxiliary component that is associated with the optimal decoding performance values and determines an offset value from the auxiliary reliability metrics comprised in the selected auxiliary component. The elementary check node processing unit (300) then transmits the offset value and a selected set of auxiliary components among the two or more auxiliary components to the variable node processing unit (305).
Encoding Method, Decoding Method, Encoding Device and Decoding Device for Structured LDPC
An encoding method, decoding method, encoding device and decoding device for structured LDPC codes. The method includes: determining a basic matrix used for encoding, which includes K0 up-and-down adjacent pairs; and according to the basic matrix and an expansion factor corresponding to the basic matrix, performing an LDPC encoding operation of obtaining a codeword of Nb×z bits according to source data of (Nb−Mb)×z bits, herein z is the expansion factor, and z is a positive integer which is greater than or equal to 1. The provided technical solution is applicable to the encoding and decoding of the structured LDPC, thereby realizing the encoding and decoding of LDPC at the high pipeline speed.
Structured low-density parity-check (LDPC) code
.[.A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[H.sub.d|H.sub.p], H.sub.d is the data portion, and H.sub.p is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing..]. .Iadd.System and method for operating a wireless device to encode data using low-density parity-check (LDPC) encoding is discussed. One example method includes: computing a number of modulated orthogonal frequency-division multiplexing (OFDM) symbols for transmitting the data; computing a number of shortening bits; distributing the number of shortening bits over the at least one LDPC codeword; computing a number of puncturing bits for the at least one LDPC codeword; distributing the number of puncturing bits over the at least one LDPC codeword; determining a criterion using at least one of the number of shortening bits and the number of puncturing bits; if the criterion is met, increasing the number of modulated OFDM symbols and recalculating the number of puncturing bits; generating the encoded data using the number of shortening bits, the number of puncturing bits, and the at least one LDPC codeword; and transmitting the encoded data..Iaddend.
METHOD AND APPARATUS FOR SUPPORTING LOW BIT RATE CODING, AND COMPUTER STORAGE MEDIUM
The disclosure discloses a method for supporting low bit rate coding. A source data packet to be coded is repeated for i times, and the data packet which is repeated for i times is coded. The disclosure also discloses an apparatus for supporting low bit rate coding and a computer storage medium.
METHOD AND APPARATUS FOR PERFORMING ENCODING ON BASIS OF PARITY CHECK MATRIX OF LOW DENSITY PARITY CHECK CODE GENERATED FROM PROTOGRAPH IN WIRELESS COMMUNICATION SYSTEM
A method for performing low density parity check (LDPC) coding of a transmitter in a wireless communication system, according to the present disclosure, may comprise the steps of: acquiring a proto-matrix corresponding to a protograph; on the basis of weights and lifting factors of columns of the proto-matrix, acquiring one or more permuted vectors corresponding to each of the columns, a first permuted vector included in the one or more permuted vectors having been randomly generated; distributing the one or more permuted vectors for each row of a corresponding column; on the basis of the distributed one or more permuted vectors, acquiring a plurality of lifted sub matrices corresponding to a plurality of elements of the proto-matrix; generating a base graph on the basis of the plurality of lifted sub matrices; generating a parity check matrix (PCM) on the basis of the base graph; and performing LDPC coding by using the PCM.
MESSAGE PASSING ALGORITHM DECODER AND METHODS
Methods and devices are disclosed for receiving and detecting sparse data sequences using a message passing algorithm (MPA) with early propagation of belief messages. Such data sequences may be used in wireless communications systems supporting multiple access, such as sparse code multiple access (SCMA) systems. The determination and passing of one or more messages for an edge between a function node and a variable node in a factor graph representation of the system may be performed in serial with determined values available early for subsequent computations. The serial computations may be scheduled based on various factors.
TECHNIQUE TO PERFORM DECODING OF WIRELESS COMMUNICATIONS SIGNAL DATA
Apparatuses, systems, and techniques to decode encoded data for fifth-generation (5G) new radio (NR). In at least one embodiment, a processor includes one or more circuits to select one or more data decoding operations to decode one or more 5G signals based, at least in part, on a sparsity of data received by the processor.
Layered decoding method for LDPC code and device therefor
An improved layered decoding method for a low density parity check (LDPC) code and a device therefor are disclosed. Disclosed is the layered decoding method for an LDPC code, capable of determining whether decoding is successful by performing a syndrome check on each check node at every variable node update. In addition, the syndrome check can be performed by using reduced variable nodes, thereby reducing decoding power consumption and decoding time consumption.
Method and Apparatus for Vertical Layered Decoding of Quasi-Cyclic Low-Density Parity Check Codes Built from Clusters of Circulant Permutation Matrices
This invention presents a method and the corresponding hardware apparatus for decoding LDPC codes using a vertical layered (VL) iterative message passing algorithm. The invention operates on quasi-cyclic LDPC (QC-LDPC) codes, for which the non-zero circulant permutation matrices (CPMs) are placed at specific locations in the parity-check matrix of the codes, forming concentrated clusters of CPMs. The purpose of the invention is to take advantage of the organization of CPMs in clusters in order to derive a specific hardware architecture, consuming less power than the classical VL decoders. This is achieved by minimizing the number of read and write accesses to the main memories of the design.