Patent classifications
H01L21/3081
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
A method for fabricating a semiconductor device includes forming a fin structure that includes a plurality of semiconductor channel layers alternatively spaced apart from one another with a plurality of semiconductor sacrificial layers. The method further includes forming a semiconductor cladding layer extending along sidewalls of the fin structure. The method further includes patterning the semiconductor cladding layer to have a top surface with a highest point and a lowest point by performing at least one sequential combination of a first etching process and a second etching process. A vertical difference between the highest point and the lowest point is less than 3 nanometers.
High-density semiconductor device
A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
COMPOSITION CONTAINING A DICYANOSTYRYL GROUP, FOR FORMING A RESIST UNDERLAYER FILM CAPABLE OF BEING WET ETCHED
A resist underlayer film that exhibits removability and preferably solubility only in wet etching reagent solutions, while exhibiting good resistance to resist developers that are resist solvents or aqueous alkali solutions. The composition for forming a resist underlayer film includes a dicyanostyryl group-bearing polymer (P) or dicyanostyryl group-bearing compound (C) and includes solvent, and does not contain a protonic acid curing catalyst and does not contain an alkylated aminoplast crosslinking agent derived from melamine, urea, benzoguanamine, or glycoluril.
PROTECTIVE FILM FORMING AGENT, AND METHOD FOR PRODUCING SEMICONDUCTOR CHIP
A protective film forming agent that, in dicing of a semiconductor wafer, is used to form a protective film on the surface of the semiconductor wafer, can form a protective film that has excellent laser processability, and has excellent solubility of a light-absorbing agent; and a method for producing a semiconductor chip using the protective film forming agent. The protective film forming agent includes a water-soluble resin, a light-absorbing agent, a basic compound, and a solvent. The basic compound is an alkylamine, an alkanolamine, an imidazole compound, ammonia, or an alkali metal hydroxide. The light-absorbing agent content of the protective film forming agent is 0.1-10 mass % (inclusive).
METHOD FOR MANUFACTURING A SUBSTRATE COMPRISING A RELAXED INGAN LAYER AND SUBSTRATE THUS OBTAINED FOR THE RESUMPTION OF GROWTH OF A LED STRUCTURE
A method for manufacturing a relaxed epitaxial InGaN layer from a GaN/InGaN substrate comprising the following steps: a) providing a first stack comprising a GaN or InGaN layer to be porosified and a barrier layer, b) transferring the GaN or InGaN layer to be porosified and the barrier layer to a porosification support, in such a way as to form a second stack, c) forming a mask on the GaN or InGaN layer to be porosified, d) porosifying the GaN or InGaN layer through the mask, e) transferring the GaN or InGaN porosified layer and the barrier layer to a support of interest, f) forming an InGaN layer by epitaxy on the barrier layer, whereby a relaxed epitaxial InGaN layer is obtained.
ACTIVE REGION PATTERNING
Semiconductor structures and fabrication processes are provided. A semiconductor according to the present disclosure includes a first region including a first fin, a second fin, and a third fin extending along a first direction, and a second region abutting the first region. The second region includes a fourth fin and a fifth fin extending along the first direction. The first fin is aligned with the fourth fin and the second fin is aligned with the fifth fin. The third fin terminates at an interface between the first region and the second region.
Buried Metal for FinFET Device and Method
A semiconductor device includes a buried metal line disposed in a semiconductor substrate, a first dielectric material on a first sidewall of the buried metal line and a second dielectric material on a second sidewall of the buried metal line, a first multiple fins disposed proximate the first sidewall of the buried metal line, a second multiple fins disposed proximate the second sidewall of the buried metal line, a first metal gate structure over the first multiple fins and over the buried metal line, wherein the first metal gate structure extends through the first dielectric material to contact the buried metal line, and a second metal gate structure over the second multiple fins and over the buried metal line.
HIGH-ASPECT RATIO METALLIZED STRUCTURES
The present techniques relate to various aspects of forming and filling high-aspect ratio trench structures (e.g., trench structures having an aspect ratio of 20 or greater, including aspect ratios in the range of 20:1 up to and including 50:1 or greater) combined with trench opening widths ranging from 0.5 micron to 50 microns. In one implementation a method to fabricate high-aspect ratio trenches in silicon is provided using a patterned photoresist on evaporated aluminum. In accordance with this approach, a high-aspect ratio trench can be formed having vertical side walls and defect-free trench bottoms. In some instances it may be desirable to fill such high-aspect ratio trench structures with a metal or other substrate to provide certain functionality associated with the fill material. Further processes and structures are related in which such trench structures are filled using a mixture of high-Z nano-particles within an epoxy resin matrix.
Semiconductor device and fabrication method thereof
A semiconductor device and fabrication method thereof are provided. The fabrication method include: providing a to-be-etched material layer; forming a plurality of discrete sacrificial layers on the to-be-etched material layer; forming first initial spacers on sidewalls of each of the discrete sacrificial layers. Each first initial spacer includes a first bottom region and a first top region on the first bottom region; removing the discrete sacrificial layers. The method further includes: removing the first top region of each first initial spacer to form a first spacer from each first bottom region; forming second spacers on sidewalls of each of the first spacers. Each second spacer includes a second bottom region and a second top region on the second bottom region; removing the first spacers; The method further includes: removing the second top regions by etching; and etching the to-be-etched material layer by using the second spacers as a mask.
Protective coating for plasma dicing
The present invention provides a method for an improved protective coating for plasma dicing a substrate. A work piece having a support film, a frame and the substrate, the substrate having a top surface and a bottom surface, the top surface of the substrate having a plurality of device structures and a plurality of street areas is provided. The work piece is formed by adhering the substrate to a support film and then mounting the substrate with the support film to a frame. A composite material coating having a matrix component and a filler component is applied to the top surface of the substrate. The filler component has a plurality of particles. The composite material coating is removed from at least one street area to expose the street area. The exposed street area is plasma etched. The composite material coating is removed from the top surface of the substrate.