Provided is a semiconductor device comprising a semiconductor substrate that includes a transistor region; an emitter electrode that is provided on the semiconductor substrate; a first dummy trench portion that is provided on the transistor region of the semiconductor substrate and includes a dummy conducting portion that is electrically connected to the emitter electrode; and a first contact portion that is a partial region of the transistor region, provided between an end portion of a long portion of the first dummy trench portion and an end portion of the semiconductor substrate, and electrically connects the emitter electrode and a semiconductor region with a first conductivity type provided in the transistor region.

There is provided a semiconductor device including: an emitter region of a first conductivity type, a contact region of a second conductivity type, provided on the front surface side of the semiconductor substrate; one or more first trench portions which are electrically connected to a gate electrode and are in contact with emitter regions; a second trench portion which is adjacent to one of the one or more first trench portions, is electrically connected to the gate electrode, is in contact with the contact region of the second conductivity type, and is not in contact with the emitter region; and a dummy trench portion which is adjacent to one of the one or more first trench portions and is electrically connected to an emitter electrode, in which the contact region in contact with the second trench portion is in contact with the emitter electrode.

An RC-IGBT includes a plurality of gate electrodes provided in a plurality of gate trenches, a plurality of dummy gate electrodes provided in a plurality of dummy trenches and having upper surfaces located below upper surfaces of the plurality of gate electrodes, an interlayer insulating film provided on an upper surface of a semiconductor substrate and having a first contact hole in which at least one side wall of each dummy trench is exposed above a corresponding dummy gate electrode, and an emitter electrode provided on the interlayer insulating film and in the first contact hole and electrically connected to a base layer on the side wall of each dummy trench exposed to the first contact hole. At least one dummy trench is disposed between two gate trenches.

Provided is a semiconductor device provided with an IGBT, comprising: a semiconductor substrate having upper and lower surfaces, throughout which bulk donors are distributed; a hydrogen peak including a local maximum arranged 25 μm or more away from the lower surface of the semiconductor substrate in a depth direction, at which a hydrogen chemical concentration shows a local maximum value; an upper tail where the hydrogen chemical concentration decreases in a direction from the local maximum toward the upper surface; and a lower tail where the hydrogen chemical concentration decreases in a direction from the local maximum toward the lower surface more gradually than the upper tail; and a first high concentration region having a donor concentration higher than a bulk donor concentration and including a region extending for 4 μm or more in a direction from the local maximum of the hydrogen peak toward the upper surface.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A semiconductor device includes a semiconductor layer having a first surface and a second surface, an element structure formed on the first surface side of the semiconductor layer and including a first conductivity type first region and a second conductivity type second region in contact with the first region, a gate electrode opposing the second region with a gate insulating film therebetween, a first conductivity type third region formed in the semiconductor layer to be in contact with the second region, and a first electrode formed on the semiconductor layer and electrically connected to the first region and the second region, in which the element structure includes a first and a second element structure, the first element structure is separated from the second region in a direction along the first surface of the semiconductor layer, and includes a second conductivity type first column layer extending in a thickness direction.

A p-type semiconductor region is formed in a front surface side of an n-type semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donors in the FS region include first, second, third and fourth peaks in order from a front surface to the rear surface. Each of the peaks has a peak maximum point, and peak end points formed at both sides of the peak maximum point. The peak maximum points of the first and second peaks are higher than the peak maximum point of the third peak. The peak maximum point of the third peak is lower than the peak maximum point of the fourth peak.

A method of manufacturing a semiconductor device having an insulated gate bipolar transistor portion and a freewheeling diode portion. The method includes introducing an impurity to a rear surface of a semiconductor substrate, performing first heat treating to activate the impurity to form a field stop layer, performing a first irradiation to irradiate light ions from the rear surface of semiconductor substrate to form, in the semiconductor substrate, a first low-lifetime region, performing a second irradiation to irradiate the light ions from the rear surface of the semiconductor substrate to form, in the field stop layer, a second low-lifetime region, and performing second heat treating to reduce a density of defects generated in the field stop layer when the second irradiation is performed. Each of the first and second low-lifetime regions has a carrier lifetime thereof shorter than that of any region of the semiconductor device other than the first and second low-lifetime regions.

An electric assembly includes an insulated gate bipolar transistor device, a wide-bandgap transistor device electrically connected in parallel with the bipolar transistor device and a control circuit. The control circuit is electrically coupled to a gate terminal of the bipolar transistor device and to a control terminal of the wide-bandgap transistor device. The control circuit is configured to turn on the bipolar transistor device and to turn on the wide-bandgap transistor device at a predefined turn-on delay with respect to a turn-on of the bipolar transistor device.

The present invention relates to a vertical semiconductor device such as an IGBT or a diode which includes an N buffer layer formed in the undersurface of and adjacent to an N.sup.− drift layer. A concentration slope δ, which is derived from displacements in a depth TB (μm) and an impurity concentration CB (cm.sup.−3), from the upper surface to the lower surface in a main portion of the N buffer layer satisfies a concentration slope condition defined by {0.03≦δ≦0.7}.