A display device according to an example embodiment of the present disclosure includes a stretchable display panel; and an actuator configured to deform the display panel, wherein the display panel includes a first area that is protruded by the actuator, a second area that is not protruded by the actuator, and a third area that is between the first area and the second area, wherein a plurality of pixels are disposed in the first area and the second area, wherein in the third area, only a plurality of connection lines connecting the plurality of pixels disposed in the first area and the plurality of pixels disposed in the second area are disposed, so that three-dimensional display capability of the display device can be improved.

An anisotropic conductive film includes a conductive layer; a first resin insulating layer over a first surface of the conductive layer; and a second resin insulating layer over a second surface of the conductive layer, wherein the conductive layer comprises a plurality of conductive particles and a nano fiber connecting the plurality of conductive particles to each other, each of the plurality of conductive particles comprising a plurality of needle-shaped protrusions having a conical shape, and wherein the first resin insulating layer and the second resin insulating layer comprise a same material and have different thicknesses.

An anisotropic conductive film includes a conductive layer; a first resin insulating layer over a first surface of the conductive layer; and a second resin insulating layer over a second surface of the conductive layer, wherein the conductive layer comprises a plurality of conductive particles and a nano fiber connecting the plurality of conductive particles to each other, each of the plurality of conductive particles comprising a plurality of needle-shaped protrusions having a conical shape, and wherein the first resin insulating layer and the second resin insulating layer comprise a same material and have different thicknesses.

A method of manufacturing a package structure is provided. The method of manufacturing a package structure comprises receiving a first semiconductor structure and a second semiconductor structure; forming an isolation layer on each semiconductor structure; forming at least one supporting structure and at least one pad trench in the isolation layer; filling the pad trench with electrically conductive material; plariarizing the isolation layer and the electrically conductive material to form bonding pads in a bonding layer on each semiconductor structure; and bonding the semiconductor structures.

A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes the following operations. A first integrated circuit component having a fuse structure is received. A second integrated circuit component having an inductor is received. The second integrated circuit component is bonded to the first integrated circuit component. The inductor is electrically connected to the fuse structure, wherein the inductor is electrically connected to a ground through the fuse structure.

A display device including pads; an anisotropic conductive film on the pads; and a connection member bonded to the pads through the film, the connection member including bumps, the film includes a supporting layer including a plurality of conductive particles having a part protruded from a first and second surface of the support layer; a first adhesive layer contacting the first surface and the part of each conductive particle protruding from the first surface; and a second adhesive layer contacting the second surface and the part of each conductive particle protruding from the second surface, and wherein the first or second adhesive layer is positioned at both of a first and second region of the display device, the first region being a region in which the pads and the bumps are overlapped and the second region being a region in which the pads and the bumps are not overlapped.

A display panel is provided. The display panel includes a frame area, and the frame area includes an array substrate and a color filter substrate. The array substrate includes a fanout area configured to dispose a fanout trace. The color filter substrate is disposed opposite to the array substrate. The color filter substrate includes a gate driver on array (GOA) circuit and a signal trace disposed at a side of the GOA circuit. The GOA circuit is electrically connected to the signal trace. The GOA circuit and the signal trace both overlap the fanout area.

A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

According to an aspect of the inventive concept, there is provided a die-to-wafer bonding structure including a die having a first test pad, a first bonding pad formed on the first test pad, and a first insulating layer, the first bonding pad penetrates the first insulating layer. The structure may further include a wafer having a second test pad, a second bonding pad formed on the second test pad, and a second insulating layer, the second bonding pad penetrates the second insulating layer. The structure may further include a polymer layer surrounding all side surfaces of the first bonding pad and all side surfaces of the second bonding pad, the polymer layer being arranged between the die and the wafer. Additionally, the wafer and the die may be bonded together.

A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes receiving a first integrated circuit component having a seal ring and a fuse structure, wherein the fuse structure is electrically connected to a ground through the seal ring; receiving a second integrated circuit component having an inductor; bonding the second integrated circuit component to the first integrated circuit component; electrically connecting the inductor to the fuse structure, wherein the inductor is electrically connected to the ground through the fuse structure; and blowing the fuse structure after a treatment.