A package structure and method of manufacturing a package structure are provided. The package structure comprises two semiconductor structures and two bonding layers sandwiched between both semiconductor structures. Each bonding layer has a plurality of bonding pads separated by an isolation layer. Each bonding pad has a bonding surface including a bonding region and at least one buffer region. The bonding regions in both bonding layers bond to each other. The buffer region of one semiconductor structure bonds to the isolation layer of the other semiconductor structure. A ratio of a surface area of the buffer region to that of the bonding region in each metal pad is from about 0.01 to about 10.

A display module includes a substrate; a thin film transistor (TFT) layer which is stacked on a front surface of the substrate; a plurality of light emitting diodes electrically connected to a plurality of TFT electrodes arranged on the TFT layer; an anti-reflection layer which is stacked on the TFT layer, has a light-absorbing color that absorbs external light, and fixes in place the plurality of light emitting diodes; and a protective layer stacked on the anti-reflection layer and the plurality of light emitting diodes. The plurality of TFT electrodes and the plurality of light emitting diodes are electrically connected to each other in the anti-reflection layer.

The disclosure relates to a display device and an anisotropic conductive film. An anisotropic conductive film disposed between a display panel and a printed circuit board, the anisotropic conductive film including a base resin, a plurality of first conductive balls dispersed in the base resin, each of the plurality of first conductive balls including a core made of a polymer material and at least one metal layer surrounding the core, and a plurality of second conductive balls dispersed in the base resin, each of the plurality of second conductive balls being made of a meltable material, and the anisotropic conductive film having a first area in which the anisotropic conductive film overlaps the first pad electrode and the first lead electrode in a thickness direction of the display device, and a second area as an area disposed between the first lead electrode and the second lead electrode. Each of the metal layer of the first conductive ball and a surface of the second conductive ball are in contact with both the first pad electrode and the first lead electrode.

A display module includes: a substrate having a mounting surface, four side surfaces, and a rear surface opposite to the mounting surface, the substrate including a thin film transistor layer (TFT) provided on the mounting surface; a plurality of inorganic light-emitting diodes provided on the mounting surface of the substrate; a side wiring electrically connected to the TFT layer and extending along a first pair of side surfaces among the four side surfaces of the substrate; a front cover covering the TFT layer and the plurality of inorganic light emitting devices in a first direction; a metal plate provided on the rear surface of the substrate; a side cover covering the side wiring and the four side surfaces; and a side member provided on a side of the side cover and grounded to the metal plate, wherein the side member is provided on a first side surface of the first pair of side surfaces along which the side wiring extends among the four side surfaces.

In some embodiments, a display module for implementing an image using an inorganic light emitting device includes a substrate, a thin film transistor (TFT) layer provided on the substrate, a plurality of connection pads provided on the TFT layer, an anisotropic conductive layer provided on the TFT layer, an inorganic light emitting element bonded to the anisotropic conductive layer, and a conductive ball control layer provided in a surrounding area of the plurality of connection pads. The anisotropic conductive layer includes an adhesive layer and a plurality of conductive balls distributed inside the adhesive layer. The inorganic light emitting element includes a plurality of electrodes corresponding to the plurality of connection pads. The conductive ball control layer is configured to restrict the plurality of conductive balls from moving in a direction perpendicular to a bonding direction while the inorganic light emitting element is being bonded to the anisotropic conductive layer.

A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes the following operations. A first integrated circuit component having a fuse structure is received. A second integrated circuit component having an inductor is received. The second integrated circuit component is bonded to the first integrated circuit component. The inductor is electrically connected to the fuse structure, wherein the inductor is electrically connected to a ground through the fuse structure.

A nanowire bonding interconnect for fine-pitch microelectronics is provided. Vertical nanowires created on conductive pads provide a debris-tolerant bonding layer for making direct metal bonds between opposing pads or vias. Nanowires may be grown from a nanoporous medium with a height between 200-1000 nanometers and a height-to-diameter aspect ratio that enables the nanowires to partially collapse against the opposing conductive pads, creating contact pressure for nanowires to direct-bond to opposing pads. Nanowires may have diameters less than 200 nanometers and spacing less than 1 μm from each other to enable contact or direct-bonding between pads and vias with diameters under 5 μm at very fine pitch. The nanowire bonding interconnects may be used with or without tinning, solders, or adhesives. A nanowire forming technique creates a nanoporous layer on conductive pads, creates nanowires within pores of the nanoporous layer, and removes at least part of the nanoporous layer to reveal a layer of nanowires less than 1 μm in height for direct bonding.

A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes receiving a first integrated circuit component having a seal ring and a fuse structure, wherein the fuse structure is electrically connected to a ground through the seal ring; receiving a second integrated circuit component having an inductor; bonding the second integrated circuit component to the first integrated circuit component; electrically connecting the inductor to the fuse structure, wherein the inductor is electrically connected to the ground through the fuse structure; and blowing the fuse structure after a treatment.

A package structure and method of manufacturing a package structure are provided. The package structure comprises two semiconductor structures and two bonding layers sandwiched between both semiconductor structures. Each bonding layer has a plurality of bonding pads separated by an isolation layer. Each bonding pad has a bonding surface including a bonding region and at least one buffer region. The bonding regions in both bonding layers bond to each other. The buffer region of one semiconductor structure bonds to the isolation layer of the other semiconductor structure. A ratio of a surface area of the buffer region to that of the bonding region in each metal pad is from about 0.01 to about 10.