H01L21/30617

METHOD FOR MANUFACTURING STRUCTURE, AND STRUCTURE

There is provided a method for manufacturing a structure, including: forming a recess portion by performing a first etching to a surface of a member composed of Group III nitride; and flattening a bottom of the recess portion by performing a second etching to the bottom, wherein in forming the recess portion, a flat portion and a protruding portion are formed on the bottom of the recess portion, the protruding portion being raised with respect to the flat portion because it is less likely to be etched by the first etching than the flat portion, and in flattening the bottom, by etching the protruding portion by the second etching, the protruding portion is lowered.

Method for selectively removing nickel platinum material
11441229 · 2022-09-13 · ·

A method of selectively removing NiPt material from a microelectronic substrate, the method comprising contacting the NiPt material with an aqueous etching composition comprising: an oxidising agent; a strong acid; and a source of chloride.

ATOMIC LAYER DEPOSITION BONDING FOR HETEROGENEOUS INTEGRATION OF PHOTONICS AND ELECTRONICS

Methods and systems are presented for heterogeneous integration of photonics and electronics with atomic layer deposition (ALD) bonding. One method includes operations for forming a compound semiconductor and for depositing (e.g., via atomic layer deposition) a continuous film of a protection material (e.g., Al.sub.2O.sub.3) on a first surface of the compound semiconductor. Further, the method includes an operation for forming a silicon on insulator (SOI) wafer, with the SOI wafer comprising one or more waveguides. The method further includes bonding the compound semiconductor at the first surface to the SOI wafer to form a bonded structure and processing the bonded structure. The protection material protects the compound semiconductor from acid etchants during further processing of the bonded structure.

REMOVING OR PREVENTING DRY ETCH-INDUCED DAMAGE IN Al/In/GaN FILMS BY PHOTOELECTROCHEMICAL ETCHING

A method comprises providing a substrate comprising an n-type Al/In/GaN semiconductor material. A surface of the substrate is dry-etched to form a trench therein and cause dry-etch damage to remain on the surface. The surface of the substrate is immersed in an electrolyte solution and illuminated with above bandgap light having a wavelength that generates electron-hole pairs in the n-type Al/In/GaN semiconductor material, thereby photoelectrochemically etching the surface to remove at least a portion of the dry-etch damage.

STRUCTURE MANUFACTURING METHOD, STRUCTURE MANUFACTURING APPARATUS AND INTERMEDIATE STRUCTURE

There is provided a structure manufacturing method, including: preparing an etching target with at least one surface comprising group III nitride; then in a state where the etching target is immersed in an etching solution containing peroxodisulfate ions, irradiating the surface of the etching target with light through the etching solution, and generating sulfate ion radicals from the peroxodisulfate ions and generating holes in the group III nitride, thereby etching the group III nitride, wherein in the etching of the group III nitride, the etching solution remains acidic during a period for etching the group III nitride by making the etching solution acidic at a start of etching the group III nitride, and the etching is performed, with a resist mask formed on the surface.

Method Of Forming A GaN Sensor Having A Controlled And Stable Threshold Voltage

A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device is provided, and the method may include: preparing a semiconductor substrate constituted of a group III nitride semiconductor, a main surface of the semiconductor substrate being a c-plane; forming a grove on the main surface by dry dry-etching the main surface; and wet-etching an inner surface of the groove using an etchant to expose the c-plane of the semiconductor substrate in a wet-etched region, the etching having an etching rate to the c-plane of the semiconductor substrate that is lower than the etching rate to a plane other than the c-plane of the semiconductor substrate.

Etching fin core to provide fin doubling

A replacement fin layer is deposited on a sub-fin layer in trenches isolated by an insulating layer on a substrate. The replacement fin layer has first component rich side portions and a second component rich core portion. The second component rich core portion is etched to generate a double fin structure comprising the first component rich fins.

Atomic layer deposition bonding for heterogeneous integration of photonics and electronics

Methods and systems are presented for heterogeneous integration of photonics and electronics with atomic layer deposition (ALD) bonding. One method includes operations for forming a compound semiconductor and for depositing (e.g., via atomic layer deposition) a continuous film of a protection material (e.g., Al.sub.2O.sub.3) on a first surface of the compound semiconductor. Further, the method includes an operation for forming a silicon on insulator (SOI) wafer, with the SOI wafer comprising one or more waveguides. The method further includes bonding the compound semiconductor at the first surface to the SOI wafer to form a bonded structure and processing the bonded structure. The protection material protects the compound semiconductor from acid etchants during further processing of the bonded structure.

ETCHING SOLUTION, AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE
20210104411 · 2021-04-08 ·

A SiGe compound etching solution for selectively etching a compound represented by general formula Si.sub.1-xGe.sub.x (provided that x is 0 or more and less than 1) relative to Si, Ge and an oxide thereof, the SiGe compound etching solution including a fluoride and an oxidizing agent, wherein the fluoride includes hexafluorosilicic acid, and an etching rate A as measured under the following conditions is 10 Å/min or more: a blanket substrate having a layer of Si.sub.0.75Ge.sub.0.25 on the surface thereof is immersed in an etching solution at 25° C., and the etching rate is measured.