The present invention provides a manufacture method of a TFT array substrate and a TFT array substrate structure, and the TFT array substrate structure comprises a substrate (1), a first metal electrode (2) on the substrate (1), a gate isolation layer (3) positioned on the substrate (1) and completely covering the first metal electrode (2), an island shaped semiconductor layer (4) on the gate isolation layer (3), a second metal electrode (6) on the gate isolation layer (3) and the island shaped semiconductor layer (4), a protecting layer (8) on the second metal electrode (6), a color resist layer (7) on the protecting layer (8), a protecting layer (12) on the color resist layer (7) and a first pixel electrode layer (9) on the protecting layer (12); a via (81) is formed on the protecting layer (8), the color resist layer (7) and the protecting layer (12), and an organic material layer (10) fills the inside of the via (81).

A method for fabricating a stacked thin film transistor (TFT) structure comprises: forming at least two TFTs on a substrate of a display device; at least partially covering the at least two TFTs with an insulating layer; forming a common electrode on the insulating layer and the at least two TFTs; covering, at least partially, the common electrode with a dielectric material, wherein the insulating layer, the common electrode, and the dielectric material each include a contact hole; filling, at least partially, the contact hole with a conductive material; and depositing the conductive material over the dielectric material to form a pixel electrode.

The present disclosure provides an array substrate, a method of manufacturing the same, a display panel and a display device. The array substrate comprises a plurality of gate lines and a plurality of data lines arranged to cross with each other and define a plurality of pixel areas, each of the pixel areas comprising a thin film transistor. The array substrate further comprises a first insulating layer arranged above the thin film transistors and the data lines; a metal layer arranged above the first insulating layer; a second insulating layer arranged above the metal layer; and a pixel electrode and a common electrode arranged above the second insulating layer, between which a third insulating layer is provided. The common electrode in each of the pixel areas at least comprises two slits and the metal layer overlies the data lines.

A thin-film transistor including a substrate, a gate electrode positioned on the substrate, a gate insulating layer positioned on the substrate and the gate electrode, a source electrode positioned on the gate insulating layer, a drain electrode positioned on the gate insulating layer, a semiconductor layer connected to the source electrode and the drain electrode, and a protective layer positioned on the semiconductor layer. The source electrode and the drain electrode each have a surface including asperities.

A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate electrode and includes a channel layer comprising an oxide semiconductor and an auxiliary layer comprising amorphous silicon. The source electrode and the drain electrode are separated from each other and connected to the semiconductor layer. A thin film transistor array panel and method of manufacturing same also is disclosed.

The present disclosure provides an array substrate, a display panel, a display device and a method for manufacturing the array substrate. The array substrate includes: a plurality of gate lines and a plurality of data lines arranged in a crisscross manner on a base substrate, so as to define a plurality of subpixels; and a common electrode arranged opposite to each of the plurality of subpixels. At least one of the subpixels is provided with a common electrode line connected to the common electrode at an identical subpixel region.

A fabrication method of a pixel structure is provided. The fabrication method includes: forming a gate electrode, a gate insulating layer, an active layer, a pixel electrode layer and a source-drain electrode layer on a substrate, and etching the source-drain electrode layer by using a photoresist pattern to form a source electrode and a drain electrode; ashing the photoresist pattern, so as to align edges of the ashed photoresist pattern with edges of the source electrode and the drain electrode; etching a silicon oxide generated in ashing the photoresist pattern; and etching a semiconductor layer between the source electrode and the drain electrode by an etching process to form a channel. The fabrication method can remove indium-containing material remained on both sides of a source electrode and a drain electrode, and can resolve a problem that a width of a channel between the source electrode and the drain electrode is small.

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

A display substrate includes a base substrate comprising a plurality of sub-pixels, a first switching element disposed on the base substrate and electrically connected to a gate line extending in a first direction and a data line extending in a second direction crossing the first direction, a color filter layer disposed on the switching element and comprising a red color filter, a green color filter, a blue color filter and a white color filter alternately disposed on the plurality of sub-pixels, respectively, a column spacer disposed on the color filter and comprising the same material as that of the white color filter, an insulation layer disposed on the color filter and the column spacer and a pixel electrode disposed on the insulation layer.