An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

A semiconductor device includes a semiconductor layer that has a first main surface at one side and a second main surface at another side, a first main surface electrode that includes a first electrode covering the first main surface and a second electrode having a higher hardness than the first electrode and covering the first electrode, and an oxide layer that covers the first main surface electrode.

We herein describe a silicon-carbide (SiC) based power semiconductor device comprising: a drain region of a first conductivity type; a drift region of the first conductivity type disposed on the drain region, the drift region having a lower doping concentration compared to the doping concentration of the drain region; a body region of a second conductivity type, opposite to the first conductivity type, disposed over the drift region; a contact region of the first conductivity type, disposed within the body region; a source Ohmic contact being disposed on the source region; and one or more trench gate regions being in contact with the source region, the body region and the drift region. Each of the one or more trench gate regions are configured to form a channel region in the body region between the source region and the drift region. At least one trench gate region comprises: two vertical sidewalls and a bottom surface between the two vertical sidewalls; and an insulation layer along the vertical side walls and the bottom surface. The insulation layer comprises different thicknesses such that the insulation layer is thinner at a portion of one of the vertical sidewalls including the channel region than at the other vertical side wall and the trench bottom.

An electronic component includes a covered object, an electrode that covers the covered object and has an electrode side wall on the covered object, an inorganic insulating film that has an inner covering portion covering the electrode such as to expose the electrode side wall, and an organic insulating film that covers the electrode side wall.

A semiconductor device includes a semiconductor layer, a transistor cell portion, formed in the semiconductor layer, a first trench, formed in the semiconductor layer, a diode, electrically separated from the transistor cell portion and having a first conductivity type portion and a second conductivity type portion disposed inside the first trench, a second trench, formed in the semiconductor layer, and a bidirectional Zener diode, electrically connected to the transistor cell portion and having a pair of first conductivity type portions, disposed inside the second trench, and at least one second conductivity type portion, formed between the pair of first conductivity type portion.

In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.

A main semiconductor device element is SiC-MOSFETs with a trench gate structure, the main semiconductor device element having main MOS regions responsible for driving the MOSFETs and main SBD regions that are regions responsible for SBD operation. The main MOS regions and the main SBD regions are adjacent to one another and each pair of a main MOS region and a main SBD region adjacent thereto share one trench. In the main SBD regions, first and second p-type regions, and Schottky electrodes at the front surface of the semiconductor substrate and forming Schottky junctions with an n.sup.−-type drift region are provided. The first p-type regions are provided along sidewalls of the trenches, in contact with the first p.sup.+-type regions at the bottoms of the trenches. The second p-type regions are provided between the first p-type regions and the Schottky electrodes, and are electrically connected to these regions.

A MOSFET cell of a semiconductor device includes a polysilicon gate electrode and an n.sup.+-source region formed in an upper portion of an n.sup.−-drift layer. An interlayer insulating film covers the gate electrode. An Al source electrode extends on the interlayer insulating film. An Al gate pad is connected to the gate electrode. A barrier metal layer that prevents diffusion of aluminum is interposed between the source electrode and the interlayer insulating film, and between the gate pad and the gate electrode.

A semiconductor device includes a semiconductor body and a device cell in the semiconductor body. The device cell includes: drift, source, body and diode regions; a pn junction between the diode and drift regions; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the trench bottom; a gate electrode in the trench and dielectrically insulated from the source, body, diode and drift regions by a gate dielectric; a further trench extending from a first surface of the semiconductor body into the semiconductor body; a source electrode arranged in the further trench adjoining the source and diode regions. The diode region includes a lower diode region arranged below the trench bottom. The lower diode region has a maximum of a doping concentration distant to the trench bottom.

A semiconductor product comprising: a first semiconductor electrode, a second semiconductor electrode and an interconnecting semiconductor electrode defining a third semiconductor electrode; a first switch, between the first semiconductor electrode and the third semiconductor electrode, provided by a first vertical insulated-gate field-effect-transistor; and a second switch, between the second semiconductor electrode and the third semiconductor electrode, provided by a second vertical insulated-gate field-effect-transistor, wherein the interconnecting semiconductor electrode interconnects the first vertical insulated gate field-effect-transistor and the second vertical insulated gate field-effect-transistor.