Patent classifications
H01L2224/29155
Silver nano-twinned thin film structure and method for forming the same
A silver nano-twinned thin film structure and a method for forming the same are provided. A silver nano-twinned thin film structure, including: a substrate; an adhesive-lattice-buffer layer over the substrate; and a silver nano-twinned thin film over the adhesive-lattice-buffer layer, wherein the silver nano-twinned thin film comprises parallel-arranged twin boundaries, and a cross-section of the silver nano-twinned thin film reveals that 50% or more of all twin boundaries are parallel-arranged twin boundaries, wherein the parallel-arranged twin boundaries include Σ3 and Σ9 boundaries, wherein the Σ3 and Σ9 boundaries include 95% or more crystal orientation.
JOINING MATERIAL, PRODUCTION METHOD FOR JOINING MATERIAL, AND JOINED BODY
In the joined body (10) in which the conductor (12) and the substrate (14) are joined by the joining material (13), the joining material (13) includes a sintered body formed by sintering silver powder. A sintered body having a porosity of 8% to 30% and a surface roughness Ra of a joining surface of 500 nm or more and 3.3 μm or less is adopted.
JOINING MATERIAL, PRODUCTION METHOD FOR JOINING MATERIAL, AND JOINED BODY
In the joined body (10) in which the conductor (12) and the substrate (14) are joined by the joining material (13), the joining material (13) includes a sintered body formed by sintering silver powder. A sintered body having a porosity of 8% to 30% and a surface roughness Ra of a joining surface of 500 nm or more and 3.3 μm or less is adopted.
Semiconductor device and method of manufacture
A device includes a redistribution structure, a first semiconductor device, a first antenna, and a first conductive pillar on the redistribution structure that are electrically connected to the redistribution structure, an antenna structure over the first semiconductor device, wherein the antenna structure includes a second antenna that is different from the first antenna, wherein the antenna structure includes an external connection bonded to the first conductive pillar, and a molding material extending between the antenna structure and the redistribution structure, the molding material surrounding the first semiconductor device, the first antenna, the external connection, and the first conductive pillar.
Semiconductor device and method of manufacture
A device includes a redistribution structure, a first semiconductor device, a first antenna, and a first conductive pillar on the redistribution structure that are electrically connected to the redistribution structure, an antenna structure over the first semiconductor device, wherein the antenna structure includes a second antenna that is different from the first antenna, wherein the antenna structure includes an external connection bonded to the first conductive pillar, and a molding material extending between the antenna structure and the redistribution structure, the molding material surrounding the first semiconductor device, the first antenna, the external connection, and the first conductive pillar.
Semiconductor module
A semiconductor module is provided with: a case having a frame that surrounds a substrate and a terminal block formed extending inward from an inner wall surface of the frame; a terminal having one end extending outward from the frame, and another end extending inward from the frame and being secured to a top face of the terminal block; a wiring member that electrically connects the terminal and a semiconductor element on the substrate; and an encapsulating resin that encapsulates the other end of the terminal, the wiring member, and the semiconductor element inside the case. A hole is formed in the top face of the terminal block. The hole is filled with the encapsulating resin, and is positioned closer to the inner wall surface of the frame than a bonding part between the terminal and the wiring member.
Semiconductor module
A semiconductor module is provided with: a case having a frame that surrounds a substrate and a terminal block formed extending inward from an inner wall surface of the frame; a terminal having one end extending outward from the frame, and another end extending inward from the frame and being secured to a top face of the terminal block; a wiring member that electrically connects the terminal and a semiconductor element on the substrate; and an encapsulating resin that encapsulates the other end of the terminal, the wiring member, and the semiconductor element inside the case. A hole is formed in the top face of the terminal block. The hole is filled with the encapsulating resin, and is positioned closer to the inner wall surface of the frame than a bonding part between the terminal and the wiring member.
METHOD FOR THE MANUFACTURE OF INTEGRATED DEVICES INCLUDING A DIE FIXED TO A LEADFRAME
A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.
Method for the manufacture of integrated devices including a die fixed to a leadframe
A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.
Semiconductor package and method for making the same
A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.