A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.

In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.

In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.

A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.

A semiconductor package includes a substrate, first to third semiconductor chips disposed on the substrate, first to third heat transfer components, first and second heat spreaders, and a trench. The first semiconductor chip is between the second and third semiconductor chips. The first to third heat transfer components are disposed on the semiconductor chips, respectively. The first heat spreader is formed on the first to third heat transfer components. The second heat spreader protrudes from the first heat spreader. The trench is formed on the second heat spreader. The second heat spreader includes first and second side units spaced apart with the trench between. A distance between an outer surface of an uppermost part of the first side unit and an outer surface of an uppermost part of the second side unit is smaller than a width of an upper surface of the first semiconductor chip.

Embodiments include semiconductor packages and methods of forming such packages. A semiconductor package includes a die on a package substrate, an integrated heat spreader (IHS) on the package substrate and above the die, and a solder thermal interface material (STIM) coupling the die to the IHS. The semiconductor package includes a low-temperature solder (LTS) paste comprising an alloy of tin and bismuth (Bi), and the LTS paste on a bottom surface of the package substrate having a ball grid array. The LTS paste may have a weight percentage of Bi greater than 35% and a melting point less than or equal to a melting point of the STIM, where the STIM includes indium. The weight percentage of Bi may be between approximately 35% to 58%. The semiconductor package may include a solder ball coupling the LTS paste on the package substrate to the LTS paste on a second package substrate.

Embodiments include semiconductor packages and methods of forming such packages. A semiconductor package includes a die on a package substrate, an integrated heat spreader (IHS) on the package substrate and above the die, and a solder thermal interface material (STIM) coupling the die to the IHS. The semiconductor package includes a low-temperature solder (LTS) paste comprising an alloy of tin and bismuth (Bi), and the LTS paste on a bottom surface of the package substrate having a ball grid array. The LTS paste may have a weight percentage of Bi greater than 35% and a melting point less than or equal to a melting point of the STIM, where the STIM includes indium. The weight percentage of Bi may be between approximately 35% to 58%. The semiconductor package may include a solder ball coupling the LTS paste on the package substrate to the LTS paste on a second package substrate.

An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.

A semiconductor package includes a substrate, first to third semiconductor chips disposed on the substrate, first to third heat transfer components, first and second heat spreaders, and a trench. The first semiconductor chip is between the second and third semiconductor chips. The first to third heat transfer components are disposed on the semiconductor chips, respectively. The first heat spreader is formed on the first to third heat transfer components. The second heat spreader protrudes from the first heat spreader. The trench is formed on the second heat spreader. The second heat spreader includes first and second side units spaced apart with the trench between. A distance between an outer surface of an uppermost part of the first side unit and an outer surface of an uppermost part of the second side unit is smaller than a width of an upper surface of the first semiconductor chip.