An object is to improve the productivity of a power semiconductor device. A power semiconductor device according to the invention includes a circuit portion having a conductor for transmitting a current and a power semiconductor element, a first base portion and a second base portion facing each other with the circuit portion interposed therebetween, and a transfer mold member which is in contact with the conductor and the power semiconductor element and is filled in a space between the first base portion and the second base portion. The first base portion includes a first flat portion that is connected to a peripheral edge of the first base portion, and a first bent portion that connects the first flat portion and another portion of the first base portion and is plastically deformed. The transfer mold member is integrally configured in contact with the first flat portion.

In described examples, a circuit (e.g., an integrated circuit) includes a semiconductor substrate that includes a frontside surface and a backside surface. A circuit element is included at the frontside surface. An optional electrical insulator layer can be included adjacent to the backside surface. A distributor layer is included adjacent to the backside surface. In some examples, the distributor layer includes a distributor material that includes a matrix of cohered nanoparticles and metallic particles embedded by the cohered nanoparticles.

Implementations described herein are related to an improved semiconductor device package for providing an electrical connection between one or more semiconductor die and one or more substrates. The one or more substrates includes a dielectric layer having a first side and a second side opposite the first side, and a first metal layer bonded to the first side of the dielectric layer, the first metal layer having a first portion and a second portion. The semiconductor device package can also include a semiconductor die disposed onto the first metal layer within the first portion of the first metal layer. In some implementations, the one or more conducting substrates includes a direct bonded copper (DBC) substrate, i.e., the metal is copper.

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

A power module according implementations of the present disclosure includes a bonding layer for bonding two adjacent members. The bonding layer is formed by melting, applying, and solidifying a bonding material that has excellent thermal conductivity and electrical conductivity. The melted bonding material includes a plurality of anti-tilting members. The two members bonded during the process of solidifying the melted bonding material are supported by the plurality of anti-tilting members. This may allow tilting caused during the formation of the bonding layer to be suppressed.

Provided is a semiconductor package including a first semiconductor chip having a bottom surface adjacent to a first active layer and an top surface opposite to the bottom surface; a first adhesive layer disposed on the top surface of the first semiconductor chip; a first conductive stud disposed on the bottom surface of the first semiconductor chip and electrically connected to the first active layer; a first conductive post disposed outside the first semiconductor chip; a redistribution structure disposed under the first semiconductor chip and including a redistribution pattern connected to the first conductive stud and the first conductive post and a redistribution insulation layer surrounding the redistribution pattern; and a molding layer surrounding the first semiconductor chip, the first adhesive layer, the first conductive stud, and the first conductive post on the redistribution structure. Also, a top surface of the molding layer, a top surface of the conductive post, and a top surface of the first adhesive layer may be coplanar.

A technique for activating a fuse function in a semiconductor device in a relatively short time is provided. The semiconductor device includes a second bonding material provided on the upper surface of the insulating substrate, a third bonding material provided on an upper surface of the semiconductor element, a through hole extending from the first circuit pattern to the second circuit pattern via the core material, a conductive film provided on an inner wall of the through hole, and a heat insulating material provided inside the through hole and surrounded by the conductive film in plan view. The conductive film allows the first circuit pattern and the second circuit pattern to be conductive.

The present disclosure relates to the field of display, specifically, to a mass transfer method for a light-emitting unit, an array substrate, and a display device. The method comprises: providing a plurality of light-emitting units in an array, wherein each light-emitting unit comprises a first electrode extending to a side edge of the light-emitting unit; providing a base substrate comprising a plurality of areas in an array, each area comprising a second electrode and an electro-curable adhesive thereon; picking up the light-emitting units by a transfer device; applying voltages to the first and second electrodes respectively; aligning the transfer device with the base substrate, such that a portion of each first electrode extending to the side edge of the light-emitting unit contacts a respective electro-curable adhesive; and separating the transfer device from the light-emitting units, such that each light-emitting unit is transferred to a respective area of the base substrate.

A semiconductor module includes: a first insulating plate; a second insulating plate is arranged above the first insulating plate; a first semiconductor device provided on an upper surface of the first insulating plate; a second semiconductor device provided on a lower surface of the second insulating plate; an insulating substrate including a third insulating plate arranged between the first insulating plate and the second insulating plate, and a conductor provided on the third insulating plate and connected to the first and second semiconductor devices; and sealing resin sealing the first and second semiconductor devices and the insulating substrate, wherein a withstand voltage of the third insulating plate is lower than withstand voltages of the first and second insulating plates.

An electronic-component-mounted module has an electronic component, a first silver-sintered bonding layer bonded on one surface of the electronic component, a circuit layer made of copper or copper alloy and bonded on the first silver-sintered bonding layer, and a ceramic substrate board bonded on the circuit layer, and further has an insulation circuit substrate board with smaller linear expansion coefficient than the electronic component, a second silver-sintered bonding layer bonded on the other surface of the electronic component, and a lead frame with smaller linear expansion coefficient than the electronic component bonded on the second silver-sintered bonding layer; and a difference in the linear expansion coefficient between the insulation circuit substrate board and the lead frame is not more than 5 ppm/° C.