To provide a wavelength selection method or a plasma processing method to achieve accurate detection of residual thickness or etching amount, there is provided a plasma processing method, in which a processing object wafer is disposed within a processing chamber in the inside of a vacuum container, and plasma is generated by supplying a processing gas into the processing chamber and used to process a processing-object film layer beforehand formed on a surface of the wafer, and at least two wavelengths are selected from among wavelengths with large mutual information in emission of a plurality of wavelengths of plasma generated during processing of the processing-object film layer, and a temporal change in the emission of at least the two wavelengths is detected, and an endpoint of the processing of the film layer is determined based on a result of the detection.

An etching method includes: (a) providing, on a support, a substrate having the first region covering the second region and the second region defining a recess receiving the first region, (b) etching the first region until or immediately before the second region is exposed, (c) exposing the substrate to plasma generated from a first process gas containing C and F atoms using a first RF signal and forming a deposit on the substrate, (d) exposing the deposit to plasma generated from a second process gas containing an inert gas using a first RF signal and selectively etching the first region to the second region, and (e) repeating (c) and (d). (c) includes using the RF signal with a frequency of 60 to 300 MHz and/or setting the support to 100 to 200° C. to control a ratio of C to F atoms in the deposit to greater than 1.

Proposed are a method and a system for removing L-FC in a plasma etching process, in which L-FC, which is condensed on a wafer, an electrode, a substrate, a head, or the like, is removed by using infrared or ultraviolet rays in a plasma etching process using an L-FC precursor.

An etching method and a plasma processing apparatus form a recess with an intended shape. The etching method includes (a) providing a substrate including a silicon-containing film and a mask on the silicon-containing film. The silicon-containing film including a first region and a second region having a boundary therebetween as viewed in cross section in a direction perpendicular to a plane direction of the substrate. The boundary includes a slope extending in a direction inclined with respect to the plane direction. The method further includes (b) etching, after (a), the first region with first plasma generated from a first process gas to form a recess, (c) supplying, after (b), second plasma generated from a second process gas containing tungsten to the substrate, and (d) etching, after (c), the recess with third plasma generated from a third process gas. The recess crosses the slope in the cross section after (d).

The present application provides a method for process a substrate. The method includes steps of providing a substrate having a sacrificial layer and an insulative layer, forming a polysilicon hardmask on the insulative layer, etching the insulative and sacrificial layers through multiple openings in the polysilicon hardmask to thus form multiple channels, depositing a metal film and a passivation film on the polysilicon hardmask and in the channels, performing a first removal process to remove portions of the passivation film and the metal film above the polysilicon hardmask, performing a second removal process to remove portions of the polysilicon hardmask exposed through the passivation film and the metal film, and performing a third removal process to remove the polysilicon hardmask and portions of the passivation film and the metal film surrounding the polysilicon is hardmask.

Apparatuses and methods with controlled resist poisoning in manufacturing semiconductor devices are described. An example apparatus includes a first structure and a second structure. The first structure includes a first conductive component and a second conductive component adjacent to one another. The second structure includes a third conductive component and a fourth conductive component adjacent to one another. The third and fourth conductive components correspond to the first and second conductive components respectively. A first distance between the first conductive component and the second conductive component is different from a second distance between the third conductive component and the fourth conductive component.

An etching method and a plasma processing apparatus form a recess with an intended shape. The etching method includes (a) providing a substrate, the substrate including a silicon-containing film and a mask on the silicon-containing film; (b) etching the silicon-containing film with a first plasma to form a recess, the first plasma generated from a first process gas; (c) supplying a second plasma to the substrate, the second plasma generated from a second process gas comprising tungsten; and (d) etching the recess with a third plasma generated from a third process gas.

The present application provides a method for manufacturing a capacitor array. The method includes steps of depositing a sacrificial layer on a bottom electrode; depositing an insulative layer on the sacrificial layer; forming a polysilicon hardmask on the insulative layer; etching the insulative layer and the sacrificial layer exposed through a plurality of openings in the polysilicon hardmask to form channels; depositing a metal film on the polysilicon hardmask and in the channels; depositing a passivation film on the metal film; depositing a conductive material in the channels and in contact with the insulative layer and the sacrificial layer; removing the sacrificial layer; and forming a top electrode on the insulative layer.

A method of manufacturing a semiconductor device includes forming a fin structure including a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, forming an isolation insulating layer so that the hard mask layer and the stacked layer are exposed from the isolation insulating layer, forming a sacrificial cladding layer over at least sidewalls of the exposed hard mask layer and stacked layer, forming layers of a first dielectric layer and an insertion layer over the sacrificial cladding layer and the fin structure, performing an annealing operation to convert a portion of the layers of the first dielectric layer and the insertion layer from an amorphous form to a crystalline form, and removing the remaining amorphous portion of the layers of the first dielectric layer and the insertion layer to form a recess.

The embodiments of the present application disclose a contact structure forming method, a contact structure, and a semiconductor device. The method includes: providing a substrate, the substrate having a plurality of isolation regions therein, the isolation regions isolating an active region on the substrate into several portions; etching the active regions and the isolation regions simultaneously by the first etching processing, to form a first contact hole, a protruding active region being formed at the active region in the bottom of the first contact hole; depositing a first dielectric layer to cover the sidewall and bottom of the first contact hole; and etching the bottom of the first contact hole by the second etching processing, to form a contact structure having a target depth.