A thin film transistor panel according to an exemplary embodiment includes: a substrate; a first transistor disposed on the substrate and including a first semiconductor layer including a low temperature polysilicon and a first control electrode overlapping the first semiconductor layer; a second transistor disposed on the substrate and including a second semiconductor layer including an oxide semiconductor and a second control electrode overlapping the second semiconductor layer; a first gate insulation layer disposed between the first semiconductor layer and the first control electrode of the first transistor and including a first insulation layer and a second insulation layer; and a second gate insulation layer disposed between the second semiconductor layer and the second control electrode of the second transistor and including the second insulation layer, wherein the density of the first insulation layer may be higher than the density of the second insulation layer, the first semiconductor layer of the first transistor may be in contact with the first insulation layer, and the second semiconductor layer of the second transistor may be in contact with the second insulation layer.

Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. Since a high potential supply line and a low potential supply line overlap each other with a protective film formed of an inorganic insulation material interposed therebetween, short-circuiting of the high potential supply line and the low potential supply line may be prevented.

The present disclosure provides a thin film transistor, a manufacturing method of the thin film transistor and a display device, configured to improve electrical property of the thin film transistor. The thin film transistor includes: an active layer, including a source and drain contact region and a channel region; a metal barrier layer, covering the source and drain contact region; a first gate insulating layer, at least covering the channel region and exposing the metal barrier layer; a gate, on the first gate insulating layer and covering the channel region; an inner layer dielectric layer, on the gate and having a through hole exposing the metal barrier layer; and a source and drain, on the inner layer dielectric layer and in contact with the metal barrier layer through the through hole.

An exemplary embodiment of the present disclosure provides a display device including: a substrate; a semiconductor layer disposed on the substrate; a first transistor including a first gate electrode disposed on the semiconductor layer; a light-emitting diode connected with the first transistor; and a first layer disposed between the substrate and the semiconductor layer, wherein the semiconductor layer includes a first electrode, a second electrode, and a channel disposed between the first electrode and the second electrode, the channel includes an impurity, and the first layer overlaps the first transistor.

A manufacturing apparatus and a manufacturing method are provided. A manufacturing apparatus includes a chamber, and a stage disposed in the chamber. The stage includes an upper surface on which a target substrate is disposed, a lower surface opposite to the upper surface, a first side surface extending between the upper surface and the lower surface in a first direction, and a second side surface extending between the upper surface and the lower surface in a second direction perpendicular to the first direction. The first side surface is in a round shape, and at least a portion of the first side surface is convex toward an outside of the stage.

The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

Display panel and display device are provided. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving transistor and an initialization transistor. The initialization transistor is configured to provide an initialization signal for a preset node. The preset node is a gate of the driving transistor, or an anode of the light-emitting element. The pixel circuit includes an oxide semiconductor transistor and a silicon transistor. An active layer of the oxide semiconductor transistor includes an oxide semiconductor, and an active layer of the silicon transistor includes silicon. The pixel circuit includes a first pixel circuit and a second pixel circuit. The first pixel circuit includes a first initialization transistor. The second pixel circuit includes a second initialization transistor. An active layer of the first initialization transistor is connected to an active layer of the second initialization transistor through a first connection wire.

A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.

This disclosure relates to the field of display technologies, and discloses a thin film transistor, a method for fabricating the same, a method for controlling the same, a display panel, and a display device. The thin film transistor includes: a base substrate, a semiconductor active layer on one side of the base substrate, a source electrically connected with one end of the semiconductor active layer, a drain electrically connected with the other end of the semiconductor active layer, a gate insulated from the semiconductor active layer, the source, and the drain, and a modulation electrode insulated from the semiconductor active layer, the gate, the source, and the drain. The modulation electrode is proximate to the drain, and an orthographic projection of the modulation electrode on the base substrate overlaps with an orthographic projection of the semiconductor active layer on the base substrate

A display panel and a display device are provided. The display panel includes: a pixel circuit including a driving transistor, a first transistor, and a second transistor; a light-emitting element; a first signal line connected to a gate of the first transistor; a second signal line connected to a gate of the second transistor; and a first capacitor. A source or drain of the first transistor is connected to a gate of the driving transistor; and a source or drain of the second transistor is connected to a source or drain of the driving transistor. When being projected on a surface of the display panel, the second signal line is located between the gate of the driving transistor and the first signal line, or the first signal line and the second signal line are located at two sides of the gate of the driving transistor respectively.