The present disclosure provides a microfluidic device comprising a set of micro-structured electrodes. The electrodes are made of a fusible alloy such as Field's Metal and are patterned on a layer of PDMS. The molten fusible alloy is poured over the patterned PDMA layer and a suction force is applied to ensure uniformity of flow of the molten metal. A second layer comprising a flow channel orthogonal to the direction of the micro-structured electrodes is disposed under the first layer to form the microfluidic device. The device shows enhanced sensitivity to RBC detection at high frequencies that are also bio-compatible (above 2 MHz). Multiple layers of the micro-structures electrodes can be sandwiched between layers of flow channels to provide a 3D microfluidic device.

Various embodiments of the present disclosure are directed towards a method for manufacturing an integrated chip, the method comprises forming an interconnect structure over a semiconductor substrate. An upper dielectric layer is formed over the interconnect structure. An outgas layer is formed within the upper dielectric layer. The outgas layer comprises a first material that is amorphous. A microelectromechanical systems (MEMS) substrate is formed over the interconnect structure. The MEMS substrate comprises a moveable structure directly over the outgas layer.

In some embodiments, electromechanical systems including a semiconductor layer that has a planar surface and includes conductive and adjacent non-conductive regions and a hermetic seal applied above the planar surface and methods of manufacturing the systems are disclosed. In some embodiments, electromechanical devices that include first and second planar semiconductor layers are disclosed. Each of the semiconductor layers includes conductive regions, and at least one conductive region from each of the layers is electrically coupled to each other. Methods of manufacturing the electromechanical devices are also disclosed.

Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

Methods and systems for MEMS devices with dual damascene formed electrodes is disclosed and may include forming first and second dielectric layers on a semiconductor substrate that includes a conductive layer at least partially covered by the first dielectric layer; removing a portion of the second dielectric layer; forming vias through the second dielectric layer and at least a portion of the second dielectric layer, where the via extends to the conductive layer; forming electrodes by filling the vias and a volume that is the removed portion of the second dielectric layer with a first metal; and coupling a micro-electro-mechanical systems (MEMS) substrate to the semiconductor substrate. A third dielectric layer may be formed between the first and second dielectric layers. A metal pad may be formed on at least one electrode by depositing a second metal on the electrode and removing portions of the second metal, which may be aluminum.

A method of manufacturing a panel transducer scale package includes securing acoustic components at predetermined locations on a first carrier substrate with a first surface of the acoustic components positioned adjacent to the first carrier substrate. ASIC components are also secured at predetermined locations on the first carrier substrate with a first surface of the ASIC components positioned adjacent to the first carrier substrate. Photoresist resin is applied over the acoustic components and the ASIC components such that a second surface of the acoustic components is left exposed from the photoresist resin. The first carrier substrate is removed to expose the first surface of the acoustic components and the first surface of the ASIC components. A buildup layer is formed including electrical pathways between each of the acoustic components and the ASIC components, and the photoresist resin is removed.

A through-glass via (TGV) formed in a glass substrate may comprise a metal plating layer formed in the TGV. The TGV may have a three-dimensional (3D) topology through the glass substrate and the metal plating layer conformally covering the 3D topology. The TGV may further comprise a barrier layer disposed over the metal plating layer, and a metallization layer disposed over the barrier layer. The metallization layer may be electrically coupled to the metal plating layer through the barrier layer. The barrier layer may comprise a metal-nitride film disposed on the metal plating layer that is electrically coupled to the metallization layer. The barrier layer may comprise a metal film disposed over the metal plating layer and over a portion of glass surrounding the TGV, and an electrically-insulating film disposed upon the metal film, the electrically-insulating film completely overlapping the metal plating layer and partially overlapping the metal film.

A method for forming a semiconductor device includes receiving a first bonded to a second substrate by a dielectric layer, wherein a conductive layer is disposed in the dielectric layer and a cavity is formed between the first substrate, the second substrate and the dielectric layer; forming a via opening in the second substrate to expose the conductive layer and a vent hole in the substrate to couple to the cavity; forming a first buffer layer covering sidewalls of the via opening and a second buffer layer covering sidewalls of the vent hole; and forming a connecting structure in the via opening and a sealing structure to seal the vent hole.

Compression cold welding methods, joint structures, and hermetically sealed containment devices are provided. The method includes providing a first substrate having at least one first joint structure which comprises a first joining surface, which surface comprises a first metal; providing a second substrate having at least one second joint structure which comprises a second joining surface, which surface comprises a second metal; and compressing together the at least one first joint structure and the at least one second joint structure to locally deform and shear the joining surfaces at one or more interfaces in an amount effective to form a metal-to-metal bond between the first metal and second metal of the joining surfaces. Overlaps at the joining surfaces are effective to displace surface contaminants and facilitate intimate contact between the joining surfaces without heat input. Hermetically sealed devices can contain drug formulations, biosensors, or MEMS devices.