Patent classifications
G01R31/281
FORM FACTOR EQUIVALENT LOAD TESTING DEVICE
An electronic load testing system is configured to emulate aspects of an integrated circuit (IC). A control module of the system is configured to be electrically coupled to a first location on a printed circuit board (PCB) of an electronic assembly, and a load module is configured to be electrically coupled to a second location on the PCB. The load module includes a load cell configured to selectively conduct current from a power supply of the electronic assembly. The first location and the second location are spaced apart and in electronic communication via one or more traces of the PCB. The control module is configured to communicate with the load module via the one or more traces of the PCB. In some examples, the load module and the IC have an equivalent form factor, such that the load module can be installed in place of the IC.
HYBRID SOCKET WARP INDICATOR
Aspects include a hybrid socket dynamic warp indicator for socket connector systems and methods of using the same to measure the warpage of a printed circuit board assembly. The method can include providing a printed circuit board having a plurality of pads and a socket. A warp indicator having a plurality of solder joint connections and a resistor array is electrically coupled to the printed circuit board to build a printed circuit board assembly. The printed circuit board assembly is subjected to a thermal event. A resistance across the resistor array is measured after the thermal event. A number of separations between one or more pads of the printed circuit board and one or more solder joint connections of the warp indicator is determined based on a change in the resistance. A defective warpage condition for the socket is determined based on the number of separations.
METHOD FOR MANUFACTURING SYSTEM ANALYSIS AND/OR MAINTENANCE
A method for factory analysis and/or maintenance, preferably including receiving factory information and/or associating defects with factory components, and optionally including acting based on defect associations and/or operating factory machines. The method is preferably associated with one or more manufacturing systems and/or elements thereof.
Method for manufacturing system analysis and/or maintenance
A method for factory analysis and/or maintenance, preferably including receiving factory information and/or associating defects with factory components, and optionally including acting based on defect associations and/or operating factory machines. The method is preferably associated with one or more manufacturing systems and/or elements thereof.
SIGNAL TESTING APPARATUS FOR PRINTED CIRCUIT BOARD
A signal testing apparatus for a printed circuit board is disclosed which includes a plurality of input terminals for receiving an external testing signal, a plurality of output terminals for supplying the printed circuit board with the external testing signal, a plurality of switches arranged between the plurality of input terminals and the plurality of output terminals for controllably coupling the plurality of input terminals to the plurality of output terminals, an ammeter for measuring a magnitude of a current on a first path provided by the coupling of the plurality of switches, and a voltmeter for measuring a magnitude of a voltage on a second path provided by the coupling of the plurality of switches.
System and method for testing a device-under-test
The invention relates to a system in particular a quantum sensor system, for testing a device-under-test, DUT, comprising: an optically excitable medium which is arranged to receive electromagnetic, EM, radiation emitted by the DUT, at least one light source configured to irradiate the medium with at least one light beam, wherein the medium is optically excited by the at least one light beam, a field generator unit configured to generate an electric and/or magnetic field within the medium, wherein a resonance frequency of the excited medium is modified by an amplitude of the electric and/or magnetic field, wherein an optical parameter, in particular a luminescence, of the exited medium is locally modified if a frequency of the EM radiation corresponds to the resonance frequency at a position in the medium, an image detector configured to acquire an image of the medium, wherein the image shows an intensity profile that results from the modification of the optical parameter, a processor configured to analyze the DUT based on the acquired image.
Residual material detection in backdrilled stubs
A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.
Enabling of functional logic in IC using thermal sequence enabling test
An integrated circuit (IC) includes functional logic therein that can be enabled by application of a predefined thermal cycle. The IC includes an enabling fuse operatively coupled to the functional logic, the functional logic being disabled unless enabled by activation of the enabling fuse. A set of thermal sensors are arranged in a physically distributed manner through at least a portion of the IC. A test control macro operatively couples to the set of thermal sensors and the enabling fuse for activating the enabling fuse to enable the functional logic in response to application of a thermal cycle that causes the set of thermal sensors to sequentially experience a thermal condition matching a thermal sequence enabling test. A related method and system for applying the predefined thermal cycle are also provided.
MICROELECTRONIC TEST INTERFACE SUBSTRATES, DEVICES, AND METHODS OF MANUFACTURE THEREOF VERTICAL AND HORIZONTAL ELECTRICAL SHIELD ON INNER LAYER CONNECTING CONDUCTOR VIAS AND CONDUCTOR TRACES OF ANY POSITIONS ON BUILDUP REDISTRIBUTION LAYER SYSTEM
An embodiment of the present invention provides a method and system of manufacturing a redistribution platform comprising and providing a base substrate; buildup layer level thereof vertical and/or horizontal electrical shield on Inner layer connecting conductor vias and traces in any positions in the buildup redistribution system.
Electric short-circuit device
An electric short-circuit device has a first electric contact piece, a second electric contact piece, and a component made of an electrical semiconductor crystalline material which blocks the flow of an electric current between the first contact piece and the second contact piece in at least one direction. An actuator is configured to apply a mechanical force to the component in response to an electric trigger signal and thereby at least partly destroy the crystalline structure of the component.