The present invention is directed to a system for testing printed circuit boards. The system is configured to test the simultaneously test a multiplicity of printed circuit boards. The system examines the electrical characteristics of a printed circuit board and is operable to identify if a printed circuit board meets a desired characteristic.

A fault diagnosis method for power electronic circuits based on optimizing a deep belief network, including steps. (1) Use RT-LAB hardware-in-the-loop simulator to set up fault experiments and collect DC-link output voltage signals in different fault types. (2) Use empirical mode decomposition to extract the intrinsic function components of the output voltage signal and its envelope spectrum and calculate various statistical features to construct the original fault feature data set. (3) Based on the feature selection method of extreme learning machine, remove the redundancy and interference features, as fault sensitive feature data set. (4) Divide the fault sensitive feature set into training samples and test samples, and primitively determine the structure of the deep belief network. (5) Use the crow search algorithm to optimize the deep belief network. (6) Obtain the fault diagnosis result.

An inspection system includes a plurality of inspection apparatuses, and a data processing apparatus capable of communicating with the plurality of inspection apparatuses. The data processing apparatus includes a storage part storing a model that determines a causal relationship between an apparatus parameter related to setting of the plurality of inspection apparatuses and index data obtained when the plurality of inspection apparatuses are operated, a collection part collecting the apparatus parameter and the index data, a determination part determining whether or not the index data is included in a predetermined allowable range, and a calculation part calculating an adjustment amount for adjusting the apparatus parameter, based on the apparatus parameter and the index data, and the model, when it is determined that the index data is not included in the predetermined allowable range.

A test and measurement device has an interface, one or more connectors, each connector to allow the test and measurement device to connect to a test and measurement instrument, and one or more processors, the one or more processors configured to execute code to cause the one or more processors to: receive one or more user inputs through the interface identifying one or more tests to perform on a device under test (DUT); form a connection through one of the one or more connectors to the DUT to perform the one or more tests and receive test result data; apply one or more machine learning models to the test result data to identify potentially anomalous test results; and generate and present a representation of the test result data and the potentially anomalous test results. A method of analyzing test data includes receiving one or more user inputs through an interface identifying one or more test to perform on a device under test (DUT), forming a connection to at least one test and measurement instrument, directing the test and measurement instrument to perform one or more tests on the DUT and receive test result data, applying one or more machine learning models to the test result data to identify potentially anomalous test results, and generating and presenting a representation of the test result data and the potentially anomalous test results.

Disclosed herein are structures and techniques for exposing circuitry in die testing. For example, in some embodiments, an integrated circuit (IC) die may include: first conductive contacts at a first face of the die; second conductive contacts at a second face of the die; die stack emulation circuitry; other circuitry; and a switch coupled to the second conductive contacts, the die stack emulation circuitry, and the other circuitry, wherein the switch is to couple the second conductive contacts to the other circuitry when the switch is in a first state, and the switch is to couple the die stack emulation circuitry to the other circuitry when the switch is in a second state different from the first state.

The systems and methods described herein are for remaining useful life prediction in electronics and include measuring a plurality of circuit parameters for each of a plurality of circuit components at a plurality of different temperatures, determining a probability density function of failure as a function of time for each of the plurality of circuit components and combining the probability density functions for each of the plurality of circuit components as a function of a circuit that contains the plurality of circuit components.

A system for monitoring a circuit, comprising a device under test, such as a power field effect transistor or capacitor, coupled to a power source and a signal source and configured to generate a power output using the signal source, a current output, a voltage output and an end of life detector coupled to the current output and the voltage output and configured to generate a first impedance as a function of the current output and the voltage output, to compare the first impedance to a second impedance and to generate an indicator if the first impedance exceeds the second impedance.

An objective of the present invention is to provide a system which can infer the cause of a recipe error and present a correction candidate for the recipe error. A recipe information presentation system or recipe error inference system according to the present invention: causes a learner to learn a correspondence between a recipe and an error originating from the recipe; and acquires from the learner an inference result as to whether the error occurs when a new recipe is used (refer to FIG. 1).

An interactive test equipment for quality evaluation of power transformers includes at least a control unit, a test question type module and an operating module. The test question type module includes at least a test set, and each of the at least a test set has a transformer, a voltage value display and a resistance value display. Based on the above design, the voltage value display and the resistance value display of the each of the at least a test set can display a measured voltage value and a measured resistance value of wiring connection of a corresponding transformer. Test subjects can initiate the interactive test equipment and select answers through the operating module, and load questions and determine answers through the control unit. The interactive test equipment is used to authenticate and evaluate a judgment ability of the test subjects in order to ensure safety of a working environment.

A device for simulating thermal loads includes a platform and a plurality of nodes supported by the platform. At least one node is a movable node connected to the platform by a movable stage to move the movable node relative to the platform.