A method for manufacturing an electronic device is provided, the method includes: providing an inspection module to inspect a first area of the electronic device to obtain a first information and inspect a second area of the electronic device to obtain a second information; transmitting the first information and the second information to a processing system; comparing the first information and the second information to obtain a difference; and transmitting a correction information to a first process machine via a first interface system. When the difference is greater than or equal to -2 and less than or equal to 2, the first process machine is started to produce. An electronic device is also provided.

A method including performing a simulation to evaluate a plurality of metrology targets and/or a plurality of metrology recipes used to measure a metrology target, identifying one or more metrology targets and/or metrology recipes from the evaluated plurality of metrology targets and/or metrology recipes, receiving measurement data of the one or more identified metrology targets and/or metrology recipes, and using the measurement data to tune a metrology target parameter or metrology recipe parameter.

A metrology target includes: a first structure arranged to be created by a first patterning process; and a second structure arranged to be created by a second patterning process, wherein the first structure and/or second structure is not used to create a functional aspect of a device pattern, and wherein the first and second structures together form one or more instances of a unit cell, the unit cell having geometric symmetry at a nominal physical configuration and wherein the unit cell has a feature that causes, at a different physical configuration than the nominal physical configuration due to a relative shift in pattern placement in the first patterning process, the second patterning process and/or another patterning process, an asymmetry in the unit cell.

An imprint apparatus for forming a pattern of an imprint material on a substrate using a mold having a mesa including a pattern region where a pattern and a mark are formed. The apparatus includes an alignment optical system which includes an illumination system configured to illuminate the mark with illumination light and a detecting system configured to detect an image of the mark illuminated by the illumination system. The illumination system includes a limiter configured to limit incidence of the illumination light to a side of the mesa, a ridge line of the mesa, and an outer region of the side.

Metrology targets, production processes and optical systems are provided, which enable metrology of device-like targets. Supplementary structure(s) may be introduced in the target to interact optically with the bottom layer and/or with the top layer of the target and target cells configurations enable deriving measurements of device-characteristic features. For example, supplementary structure(s) may be designed to yield Moiré patterns with one or both layers, and metrology parameters may be derived from these patterns. Device production processes were adapted to enable production of corresponding targets, which may be measured by standard or by provided modified optical systems, configured to enable phase measurements of the Moiré patterns.

Disclosed is target arrangement comprising a first target region having at least a first pitch and at least a second pitch a second target region having at least a third pitch, wherein a portion of the first target region having a second pitch overlaps with a portion of the second target region.

Metrology targets and methods are provided, which comprise at least two overlapping structures configured to be measurable in a mutually exclusive manner at least at two different corresponding optical conditions. The targets may be single cell targets which are measured at different optical conditions which enable independent measurements of the different layers of the target. Accordingly, the targets may be designed to be very small, and be located in-die for providing accurate metrology measured of complex devices.

A method for calibrating the alignment of a wafer is provided. A plurality of alignment position deviation (APD) simulation results are obtained form a plurality of mark profiles. An alignment analysis is performed on a mark region of the wafer with a light beam. A measured APD of the mark region of the wafer is obtained in response to the light beam. The measured APD is compared with the APD simulation results to obtain alignment calibration data. An exposure process is performed on the wafer with a mask according to the alignment calibration data.

The first layer mark and the second layer mark are adapted to be projected onto each other during the lithographic process. The first layer components and the second layer components are adapted to be arranged in a plurality of different overlay configurations, each overlay configuration comprising a number of the plurality of the first layer components and a number of the plurality of the second layer components, and each overlay configuration having a different overlay distance at which each first layer component is arranged in a first direction of an associated second layer component of the second layer components. The method comprises determining an overlay step which represents a difference between the different overlay distances of the plurality of overlay configurations, determining a largest overlay distance, determining the number of first layer components and/or the number of associated second layer components in each overlay configuration.

Electron beam overlay targets and method of performing overlay measurements on a target using a semiconductor metrology tool are provided. One target includes a plurality of electron beam overlay elements and a plurality of two-dimensional elements that provide at least one two-dimensional imaging. The plurality of two dimensional elements are an array of evenly-spaced polygonal gratings across at least three rows and at least three columns. Another target includes a plurality of electron beam overlay elements and a plurality of AIMid elements. Each of the electron beam overlay elements includes at least two gratings that are overlaid at a perpendicular orientation to each other. The plurality of AIMid elements includes at least two gratings that are overlaid at a perpendicular orientation to each other.